The Experts below are selected from a list of 360 Experts worldwide ranked by ideXlab platform
Rao Tummala - One of the best experts on this subject based on the ideXlab platform.
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reliability of fine pitch μ m diameter Microvias for high density interconnects
IEEE Transactions on Components Packaging and Manufacturing Technology, 2020Co-Authors: Shreya Dwarakanath, Madhavan Swaminathan, Takenori Kakutani, Daichi Okamoto, P M Raj, Rao TummalaAbstract:Downscaling of package wiring has been the singular focus to achieve higher logic-memory interconnect density to meet next-generation needs for high-bandwidth computing. This article presents, for the first time, a systematic modeling and experimental study of sub-5- $\mu \text{m}$ -diameter microvia reliability. Geometry design considerations and build-up dielectric material properties in evaluating the microvia fatigue life are investigated. Finally, experimental thermal-cycling reliability results of sub-5- $\mu \text{m}$ -diameter Microvias are correlated with the modeling results.
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innovative sub 5 mu m Microvias by picosecond uv laser for post moore packaging interconnects
IEEE Transactions on Components Packaging and Manufacturing Technology, 2019Co-Authors: Fuhan Liu, Chandrasekharan Nair, Bartlet Deprospo, Rao Tummala, Gaurav Khurana, Rui Zhang, Atom Watanabe, Madhavan SwaminathanAbstract:This article presents for the first time Microvias scaled down to sub- $5~\mu \text{m}$ in diameter fabricated using picosecond UV laser ablation in a nonphotoimageable dielectric film. The motivation of this article is to address post-Moore and More-than-Moore packaging interconnect needs. Microvias play a critical role in package interconnections in IO density and the IC bump pitch for 2.5-D interposers and fan-out packages. UV laser ablation has been the key technology for fabricating small Microvias in high density interconnect (HDI) packaging for more than two decades. The state-of-the-art microvia fabricated by UV laser ablation is still at $20~\mu \text{m}$ in diameter and 50 $\mu \text{m}$ in pitch. This article explores the feasibility of fabricating Microvias of $5~\mu \text{m}$ or less in diameter with a commercially available picosecond UV laser system. The experimental results show that Microvias of $5~\mu \text{m}$ or less in diameter in a 5- $\mu \text{m}$ -thick Ajinomoto buildup dielectric film (ABF) are achieved. This article also addresses the fundamentals of picosecond pulsed laser ablation on polymer dielectric materials and processes optimization to generate sub-5- $\mu \text{m}$ Microvias. The via pitch of 8– $12~\mu \text{m}$ is demonstrated. UV laser ablation also addresses the issue of limited availability of photosensitive dielectric materials for photolithography-based microvia fabrication.
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next generation of 2 7 micron ultra small Microvias for 2 5d panel redistribution layer by using laser and photolithography technologies
Electronic Components and Technology Conference, 2019Co-Authors: Fuhan Liu, Chandrasekharan Nair, Bartlet Deprospo, Gaurav Khurana, Atom Watanabe, Atsushi Kubo, Cheng Ping Lin, Toshiyuki Makita, Naoki Watanabe, Rao TummalaAbstract:Microvia is the vertical interconnect structure for multi-layer redistribution layers (RDLs) in high-density interconnect (HDI) printed circuit boards (PCBs), HDI package substrates, 2.5D interposers and fan-out packages. Three technologies such as photolithography, UV laser and excimer laser have been used to form small Microvias (≤ 20 µm diameter) in polymer dielectrics. All the three above mentioned technologies are studied and compared in the work presented in this paper. Photovia was first introduced by IBM for Surface Laminar Circuit technology and it has scaled down from 125 µm then to below 10 µm today. The smallest photovia demonstrated is 2 µm in diameter by using 365 nm photolithography in 5 µm thick TOK photo-imageable dielectric (PID) (IF4605) film. Photovias of 3 µm diameter were also demonstrated in 5 µm thick Taiyo Ink dielectric dry film material (PDM) which passed 1,500 thermal cycles (-55 C to 125 C). The limitation of photovia technology is the availability and cost of photo-sensitive dielectric materials with the required electrical, mechanical, thermal and chemical properties. The state-of-the-art microvia diameter is 20 µm by using conventional high-speed UV laser technologies. Multi-layer RDL with Microvias and trenches of 4 µm feature sizes are simultaneously fabricated in a 7 µm thick Ajinomoto Build-up Film (ABF) with small fillers by using excimer laser and passed 1,000 thermal cycles (-55 C to 125 C). This paper demonstrates a novel picosecond UV laser technology to push the limits of low-cost UV laser technology by optimizing laser parameters and dielectric materials. The Cornerstone picosecond UV laser tool from ESI is capable of producing output power of 16W at 355 nm wavelength. The pulse duration is 5 ps which minimizes the heat-affected zone of polymer dielectric and the high (80 MHz) repetition rate enables this laser to be used in high throughput manufacturing processes. Microvias with minimum diameter of < 7 µm were fabricated in 5 µm thick ABF with small fillers and in 7 µm thick novel Panasonic low stress dielectric film-S (PLS-S), by using 355 nm picosecond UV laser tool. These ABF and PLS-S films are non-photosensitive dielectric materials. This is the first demonstration of very small Microvias (< 7 µm) in polymer dielectrics using UV laser ablation. The motivation of this work is to address the high RDL interconnect density requirements for 2.5D interposer and high density (HD) fan-out packages. The next generation of low-cost, ultra-small Microvias will (1) Increase the RDL I/O density, (2) Meet fine bump pitch requirements, (3) Reduce the metal layer count for package substrate RDL, (4) Fill the gap between semiconductor back-end-of-line (BEOL) process and semi-additive process (SAP) and thereby (5) Improve the packaging performance at lower costs.
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Reliability Studies of Excimer Laser-Ablated Microvias Below 5 Micron Diameter in Dry Film Polymer Dielectrics for Next Generation, Panel-Scale 2.5D Interposer RDL
2018 IEEE 68th Electronic Components and Technology Conference (ECTC), 2018Co-Authors: Chandrasekharan Nair, Bartlet Deprospo, Habib Hichri, Markus Arendt, Venky Sundaram, Rao TummalaAbstract:This paper demonstrates the thermal cycling reliability of 4 µm diameter Microvias using an ultra-thin dry film ABF, a non-photosensitive dielectric material. Such via scaling in conjunction with line scaling to achieve silicon BEOL-like RDL densities is required for the next generation of interposers. The dry film dielectric, ABF, is an epoxy-silica filler based material. This is an ideal material for a double-sided, panel-scale compatible electroless copper seed metal deposition process. The test vehicle consisting of daisy chain structures used for the reliability studies was fabricated by an excimer laser dual damascene process. The trenches for the daisy chain line and pad structures were first formed in a novel dry film ABF material. Microvias with diameter of 4 µm were then ablated in the film. The stepper system of the excimer laser allowed sub-micron alignment accuracy for the via structures. Two different capture pad structures were used to land the Microvias. The 4 µm diameter Microvias were landed in 4 µm width and 5 µm width capture pad structures. A panel-based electroless copper seed metal deposition process was used to form a conductive layer on the polymer film. The desmear process during the electroless deposition increased the microvia diameter to 5 µm and the capture pad widths to 5 µm and 6 µm respectively. The structures were filled by conventional electrolytic plating process and overburdened to a thickness of 5 µm. The panel-scalable Surface Planar DFS8910 tool was used to fly-cut 1 µm deep into the polymer and achieve the final circuitry. The challenges of this mechanical fly-cut process with filler based ABF materials and removal of complete electroless copper seed from the polymer anchors will be discussed. The resistance of the daisy chain structures containing an array of 400 Microvias was measured after the planarization process. A yield of 88 % was achieved on a 300 mm wafer with 4 µm Microvias and 5 µm capture pad structures with excellent daisy chain resistance. The samples were then exposed to: (A) 1000 liquid-to-liquid thermal shock cycles with a dwell time of 5 mins each at 125 °C and -55 °C and (B) 1000 air-to-air thermal cycles from -55 °C to 125 °C with a dwell time of 15 mins at each temperature node and a total cycle time of 1 hour. The resistances after thermal cycling tests showed an average increase of < 5 %, well within the 10 % resistance change criteria.
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via in trench a revolutionary panel based package rdl configuration capable of 200 450 io mm layer an innovation for more than moore system integration
Electronic Components and Technology Conference, 2017Co-Authors: Fuhan Liu, Chandrasekharan Nair, Venky Sundaram, Rui Zhang, Atsushi Kubo, Tomoyuki Ando, Hang Chen, Kwon Sang Lee, Rao TummalaAbstract:This paper presents, for the first time, a novel silicon damascene like via-in-trench (ViT) interconnect for panel-scale package redistribution layer (RDL) configuration. The panel scale damascene RDL in this paper comprises of ultra-fine copper embedded trenches and Microvias with diameter equal to the width of trenches using a 5 µm thick dry film photosensitive dielectric. A 140 µm thick glass substrate is used as the core material. The new panel scalable ViT interconnect is targeted for low cost, next generation 2D and 2.5D interposers and high density packages. The ViT RDL is integrated with 2 µm diameter Microvias with 2.5 µm half-line pitch copper traces embedded in a 5 µm thick dry film photo-imageable dielectric (PID) polymer. This RDL integration directly translates to IO density of 200 IO/mm/layer. IO/mm/layer, as defined by Intel, is the number of wires routed per mm of die edge on each layer of package substrate. There is no capture pad required for ViT interconnect demonstrated in this paper. The routing Cu trace is aligned directly on top of microvia instead of the conventional via-capture pad-trace interconnect configuration. The fabrication of such a high density RDL is achieved by patterning a trench over via and then fully filling with copper. Conventional i-line (365 nm) photolithography, widely used for patterning PWB and package substrates, was employed for fine trenches formation as well as small Microvias in the PID. An advanced 5 µm thick PID film IF4605 was selected for build-up layers. Experimental results showed that Microvias with diameters of 2 µm and trenches with half-line pitch of 2.5 µm were achieved in 5 µm thick IF dry film. Traces with half-line pitch of 1 µm were demonstrated in a 3 µm thick liquid photo resist film. The aspect ratios were 2.5 for dry film PID and 3 for liquid photo-resist respectively. The best interconnection density in terms of IO/mm/layer was calculated to be 200 using dry film PID and can be extended to 450 using thinner PIDs. For comparison, the IO density for state-of-the-art organic interposer was 40 by using semi-additive process (SAP). The embedded trench technology breaks through the limit of SAP and achieves 5-10X interconnect density compared to SAP. The ViT interconnect is a revolutionary package RDL configuration to meet the requirements of future package substrates for high performance computing, high bandwidth memory and micro-miniaturized system applications. The demonstration of ViT RDL configuration on thin glass substrate with L/S/Via/Pitch of 2.5/2.5/2/20 µm using embedded trench approach will be presented and the fabrication processes will be described in detail.
D J Donoghue - One of the best experts on this subject based on the ideXlab platform.
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analysis of pesticide residues in eggs by direct sample introduction gas chromatography tandem mass spectrometry
Journal of Agricultural and Food Chemistry, 2001Co-Authors: Steven J Lehotay, Alan R Lightfield, Jennifer A Harmanfetcho, D J DonoghueAbstract:Direct sample introduction (DSI) or “dirty sample injection” is a rapid, rugged, and inexpensive approach to large volume injection in gas chromatography (GC) for semivolatile analytes such as pesticides. DSI of complex samples such as eggs requires a very selective detection technique, such as tandem mass spectrometry (MS−MS), to determine the analytes among the many semivolatile matrix components that also appear. In DSI, the nonvolatile matrix components that normally would contaminate the GC system in traditional injection methods remain in a disposable microvial, which is removed after every injection. For example, 3 μg of nonvolatile residue typically remained in the microvial after an injection of egg extract using the DSI method. This analytical procedure involves the following: (i) weighing 10 g of egg in a centrifuge tube and adding 2 g of NaCl and 19.3 mL of acetonitrile (MeCN); (ii) blending for 1 min using a probe blender; (iii) centrifuging for 10 min; and (iv) analyzing 10 μL (5 mg of egg ...
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analysis of pesticide residues in eggs by direct sample introduction gas chromatography tandem mass spectrometry
Journal of Agricultural and Food Chemistry, 2001Co-Authors: Steven J Lehotay, Alan R Lightfield, Jennifer A Harmanfetcho, D J DonoghueAbstract:Direct sample introduction (DSI) or "dirty sample injection" is a rapid, rugged, and inexpensive approach to large volume injection in gas chromatography (GC) for semivolatile analytes such as pesticides. DSI of complex samples such as eggs requires a very selective detection technique, such as tandem mass spectrometry (MS-MS), to determine the analytes among the many semivolatile matrix components that also appear. In DSI, the nonvolatile matrix components that normally would contaminate the GC system in traditional injection methods remain in a disposable microvial, which is removed after every injection. For example, 3 microg of nonvolatile residue typically remained in the microvial after an injection of egg extract using the DSI method. This analytical procedure involves the following: (i) weighing 10 g of egg in a centrifuge tube and adding 2 g of NaCl and 19.3 mL of acetonitrile (MeCN); (ii) blending for 1 min using a probe blender; (iii) centrifuging for 10 min; and (iv) analyzing 10 microL (5 mg of egg equivalent) of the extract using DSI/GC/MS-MS. No sample cleanup or solvent evaporation steps were required to achieve quantitative and confirmatory results with <10 ng/g detection limits for 25 of 43 tested pesticides from several chemical classes. The remaining pesticides gave higher detection limits due to poor fragmentation characteristics in electron impact ionization and/or degradation. Analysis of eggs incurred with chlorpyrifos-methyl showed a similar trend in the results as a more traditional approach.
Steven J Lehotay - One of the best experts on this subject based on the ideXlab platform.
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analysis of pesticide residues in eggs by direct sample introduction gas chromatography tandem mass spectrometry
Journal of Agricultural and Food Chemistry, 2001Co-Authors: Steven J Lehotay, Alan R Lightfield, Jennifer A Harmanfetcho, D J DonoghueAbstract:Direct sample introduction (DSI) or “dirty sample injection” is a rapid, rugged, and inexpensive approach to large volume injection in gas chromatography (GC) for semivolatile analytes such as pesticides. DSI of complex samples such as eggs requires a very selective detection technique, such as tandem mass spectrometry (MS−MS), to determine the analytes among the many semivolatile matrix components that also appear. In DSI, the nonvolatile matrix components that normally would contaminate the GC system in traditional injection methods remain in a disposable microvial, which is removed after every injection. For example, 3 μg of nonvolatile residue typically remained in the microvial after an injection of egg extract using the DSI method. This analytical procedure involves the following: (i) weighing 10 g of egg in a centrifuge tube and adding 2 g of NaCl and 19.3 mL of acetonitrile (MeCN); (ii) blending for 1 min using a probe blender; (iii) centrifuging for 10 min; and (iv) analyzing 10 μL (5 mg of egg ...
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analysis of pesticide residues in eggs by direct sample introduction gas chromatography tandem mass spectrometry
Journal of Agricultural and Food Chemistry, 2001Co-Authors: Steven J Lehotay, Alan R Lightfield, Jennifer A Harmanfetcho, D J DonoghueAbstract:Direct sample introduction (DSI) or "dirty sample injection" is a rapid, rugged, and inexpensive approach to large volume injection in gas chromatography (GC) for semivolatile analytes such as pesticides. DSI of complex samples such as eggs requires a very selective detection technique, such as tandem mass spectrometry (MS-MS), to determine the analytes among the many semivolatile matrix components that also appear. In DSI, the nonvolatile matrix components that normally would contaminate the GC system in traditional injection methods remain in a disposable microvial, which is removed after every injection. For example, 3 microg of nonvolatile residue typically remained in the microvial after an injection of egg extract using the DSI method. This analytical procedure involves the following: (i) weighing 10 g of egg in a centrifuge tube and adding 2 g of NaCl and 19.3 mL of acetonitrile (MeCN); (ii) blending for 1 min using a probe blender; (iii) centrifuging for 10 min; and (iv) analyzing 10 microL (5 mg of egg equivalent) of the extract using DSI/GC/MS-MS. No sample cleanup or solvent evaporation steps were required to achieve quantitative and confirmatory results with <10 ng/g detection limits for 25 of 43 tested pesticides from several chemical classes. The remaining pesticides gave higher detection limits due to poor fragmentation characteristics in electron impact ionization and/or degradation. Analysis of eggs incurred with chlorpyrifos-methyl showed a similar trend in the results as a more traditional approach.
Fuhan Liu - One of the best experts on this subject based on the ideXlab platform.
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innovative sub 5 mu m Microvias by picosecond uv laser for post moore packaging interconnects
IEEE Transactions on Components Packaging and Manufacturing Technology, 2019Co-Authors: Fuhan Liu, Chandrasekharan Nair, Bartlet Deprospo, Rao Tummala, Gaurav Khurana, Rui Zhang, Atom Watanabe, Madhavan SwaminathanAbstract:This article presents for the first time Microvias scaled down to sub- $5~\mu \text{m}$ in diameter fabricated using picosecond UV laser ablation in a nonphotoimageable dielectric film. The motivation of this article is to address post-Moore and More-than-Moore packaging interconnect needs. Microvias play a critical role in package interconnections in IO density and the IC bump pitch for 2.5-D interposers and fan-out packages. UV laser ablation has been the key technology for fabricating small Microvias in high density interconnect (HDI) packaging for more than two decades. The state-of-the-art microvia fabricated by UV laser ablation is still at $20~\mu \text{m}$ in diameter and 50 $\mu \text{m}$ in pitch. This article explores the feasibility of fabricating Microvias of $5~\mu \text{m}$ or less in diameter with a commercially available picosecond UV laser system. The experimental results show that Microvias of $5~\mu \text{m}$ or less in diameter in a 5- $\mu \text{m}$ -thick Ajinomoto buildup dielectric film (ABF) are achieved. This article also addresses the fundamentals of picosecond pulsed laser ablation on polymer dielectric materials and processes optimization to generate sub-5- $\mu \text{m}$ Microvias. The via pitch of 8– $12~\mu \text{m}$ is demonstrated. UV laser ablation also addresses the issue of limited availability of photosensitive dielectric materials for photolithography-based microvia fabrication.
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next generation of 2 7 micron ultra small Microvias for 2 5d panel redistribution layer by using laser and photolithography technologies
Electronic Components and Technology Conference, 2019Co-Authors: Fuhan Liu, Chandrasekharan Nair, Bartlet Deprospo, Gaurav Khurana, Atom Watanabe, Atsushi Kubo, Cheng Ping Lin, Toshiyuki Makita, Naoki Watanabe, Rao TummalaAbstract:Microvia is the vertical interconnect structure for multi-layer redistribution layers (RDLs) in high-density interconnect (HDI) printed circuit boards (PCBs), HDI package substrates, 2.5D interposers and fan-out packages. Three technologies such as photolithography, UV laser and excimer laser have been used to form small Microvias (≤ 20 µm diameter) in polymer dielectrics. All the three above mentioned technologies are studied and compared in the work presented in this paper. Photovia was first introduced by IBM for Surface Laminar Circuit technology and it has scaled down from 125 µm then to below 10 µm today. The smallest photovia demonstrated is 2 µm in diameter by using 365 nm photolithography in 5 µm thick TOK photo-imageable dielectric (PID) (IF4605) film. Photovias of 3 µm diameter were also demonstrated in 5 µm thick Taiyo Ink dielectric dry film material (PDM) which passed 1,500 thermal cycles (-55 C to 125 C). The limitation of photovia technology is the availability and cost of photo-sensitive dielectric materials with the required electrical, mechanical, thermal and chemical properties. The state-of-the-art microvia diameter is 20 µm by using conventional high-speed UV laser technologies. Multi-layer RDL with Microvias and trenches of 4 µm feature sizes are simultaneously fabricated in a 7 µm thick Ajinomoto Build-up Film (ABF) with small fillers by using excimer laser and passed 1,000 thermal cycles (-55 C to 125 C). This paper demonstrates a novel picosecond UV laser technology to push the limits of low-cost UV laser technology by optimizing laser parameters and dielectric materials. The Cornerstone picosecond UV laser tool from ESI is capable of producing output power of 16W at 355 nm wavelength. The pulse duration is 5 ps which minimizes the heat-affected zone of polymer dielectric and the high (80 MHz) repetition rate enables this laser to be used in high throughput manufacturing processes. Microvias with minimum diameter of < 7 µm were fabricated in 5 µm thick ABF with small fillers and in 7 µm thick novel Panasonic low stress dielectric film-S (PLS-S), by using 355 nm picosecond UV laser tool. These ABF and PLS-S films are non-photosensitive dielectric materials. This is the first demonstration of very small Microvias (< 7 µm) in polymer dielectrics using UV laser ablation. The motivation of this work is to address the high RDL interconnect density requirements for 2.5D interposer and high density (HD) fan-out packages. The next generation of low-cost, ultra-small Microvias will (1) Increase the RDL I/O density, (2) Meet fine bump pitch requirements, (3) Reduce the metal layer count for package substrate RDL, (4) Fill the gap between semiconductor back-end-of-line (BEOL) process and semi-additive process (SAP) and thereby (5) Improve the packaging performance at lower costs.
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via in trench a revolutionary panel based package rdl configuration capable of 200 450 io mm layer an innovation for more than moore system integration
Electronic Components and Technology Conference, 2017Co-Authors: Fuhan Liu, Chandrasekharan Nair, Venky Sundaram, Rui Zhang, Atsushi Kubo, Tomoyuki Ando, Hang Chen, Kwon Sang Lee, Rao TummalaAbstract:This paper presents, for the first time, a novel silicon damascene like via-in-trench (ViT) interconnect for panel-scale package redistribution layer (RDL) configuration. The panel scale damascene RDL in this paper comprises of ultra-fine copper embedded trenches and Microvias with diameter equal to the width of trenches using a 5 µm thick dry film photosensitive dielectric. A 140 µm thick glass substrate is used as the core material. The new panel scalable ViT interconnect is targeted for low cost, next generation 2D and 2.5D interposers and high density packages. The ViT RDL is integrated with 2 µm diameter Microvias with 2.5 µm half-line pitch copper traces embedded in a 5 µm thick dry film photo-imageable dielectric (PID) polymer. This RDL integration directly translates to IO density of 200 IO/mm/layer. IO/mm/layer, as defined by Intel, is the number of wires routed per mm of die edge on each layer of package substrate. There is no capture pad required for ViT interconnect demonstrated in this paper. The routing Cu trace is aligned directly on top of microvia instead of the conventional via-capture pad-trace interconnect configuration. The fabrication of such a high density RDL is achieved by patterning a trench over via and then fully filling with copper. Conventional i-line (365 nm) photolithography, widely used for patterning PWB and package substrates, was employed for fine trenches formation as well as small Microvias in the PID. An advanced 5 µm thick PID film IF4605 was selected for build-up layers. Experimental results showed that Microvias with diameters of 2 µm and trenches with half-line pitch of 2.5 µm were achieved in 5 µm thick IF dry film. Traces with half-line pitch of 1 µm were demonstrated in a 3 µm thick liquid photo resist film. The aspect ratios were 2.5 for dry film PID and 3 for liquid photo-resist respectively. The best interconnection density in terms of IO/mm/layer was calculated to be 200 using dry film PID and can be extended to 450 using thinner PIDs. For comparison, the IO density for state-of-the-art organic interposer was 40 by using semi-additive process (SAP). The embedded trench technology breaks through the limit of SAP and achieves 5-10X interconnect density compared to SAP. The ViT interconnect is a revolutionary package RDL configuration to meet the requirements of future package substrates for high performance computing, high bandwidth memory and micro-miniaturized system applications. The demonstration of ViT RDL configuration on thin glass substrate with L/S/Via/Pitch of 2.5/2.5/2/20 µm using embedded trench approach will be presented and the fabrication processes will be described in detail.
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demonstration of 20 um i o pitch rdl using a novel ultra thin dry film photosensitive dielectric for panel based glass interposers
Electronic Components and Technology Conference, 2016Co-Authors: Atsushi Kubo, Chandrasekharan Nair, Venky Sundaram, Fuhan Liu, Tomoyuki Ando, Ryuta Furuya, Rao TummalaAbstract:This paper demonstrates, for the first time, a high density, low cost redistribution layer (RDL) stack-up using a novel, ultra-thin dry film photosensitive dielectric material for panel scale 2.5D glass interposers and fan-out packages. The salient features of this semi-additive process based RDL demonstrator include: (1) A two metal layer RDL structure with integration of 5 µm Microvias at 20 µm pitch and escape routing of 2 µm Cu traces at 4 µm pitch. (2) 5 µm Microvias fabricated using low cost i-line 365 nm UV photolithography process in ultra-thin 5 µm dry film photosensitive dielectric. The new photosensitive dielectrics, IF4605 (5 µm thick) and IF4610 (10 µm thick) in discussion, are primarily epoxy polymer based dry films. Epoxy resin is the standard polymer dielectric used in conventional package substrates today. Also, IF films have low dielectric constant and low curing temperatures as is the case with conventional epoxy dielectrics. This paper will demonstrate a multi-layer RDL stack with IF dry film for 20 µm I/O pitch interposers or fan-out packages. The panel based sputtering approach will be used to deposit Ti and Cu as the barrier and seed layers respectively. This also ensures high yield and reliability of the fine pitch Cu traces. The reliability of fine pitch Cu photovias are currently being evaluated for thermal cycling tests (TCT). Initial results are presented in the paper.
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a novel technology for stacking Microvias on printed wiring board
Electronic Components and Technology Conference, 2003Co-Authors: Fuhan Liu, Venky Sundaram, D Sutter, G White, A O Aggarwal, S M Hosseini, Rao TummalaAbstract:A novel stacked microvia technology is being developed by the Packaging Research Center (PRC) at the Georgia Institute of Technology for system-on-a package (SOP) applications. This ultra-high density build-up multilayer technology uses low cost processes to fabricate stacked Microvias of non-conformal copper studs with uniform height on organic printed wiring boards. This process involves the use of copper panel plating and selective etch back using a protective or barrier layer to protect the underlying circuit traces. We have termed this new process PES (Panel Plating Etch Stud). Stacked via technology offers higher wiring capability and improved performance compared with conventional conformal Microvias used for high density interconnect (HDI) boards. This paper will review the current statns of via filling technologies for stacked vias and descrihe the new P'ES process along with preliminary results. In addition, the PRC is also developing ultra fme circuit lines and spaces on printed circuit boards. The use of stacked vias along with ultra fme line technology will dramatically reduce size and increase performance of electronic systems.
Alan R Lightfield - One of the best experts on this subject based on the ideXlab platform.
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analysis of pesticide residues in eggs by direct sample introduction gas chromatography tandem mass spectrometry
Journal of Agricultural and Food Chemistry, 2001Co-Authors: Steven J Lehotay, Alan R Lightfield, Jennifer A Harmanfetcho, D J DonoghueAbstract:Direct sample introduction (DSI) or “dirty sample injection” is a rapid, rugged, and inexpensive approach to large volume injection in gas chromatography (GC) for semivolatile analytes such as pesticides. DSI of complex samples such as eggs requires a very selective detection technique, such as tandem mass spectrometry (MS−MS), to determine the analytes among the many semivolatile matrix components that also appear. In DSI, the nonvolatile matrix components that normally would contaminate the GC system in traditional injection methods remain in a disposable microvial, which is removed after every injection. For example, 3 μg of nonvolatile residue typically remained in the microvial after an injection of egg extract using the DSI method. This analytical procedure involves the following: (i) weighing 10 g of egg in a centrifuge tube and adding 2 g of NaCl and 19.3 mL of acetonitrile (MeCN); (ii) blending for 1 min using a probe blender; (iii) centrifuging for 10 min; and (iv) analyzing 10 μL (5 mg of egg ...
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analysis of pesticide residues in eggs by direct sample introduction gas chromatography tandem mass spectrometry
Journal of Agricultural and Food Chemistry, 2001Co-Authors: Steven J Lehotay, Alan R Lightfield, Jennifer A Harmanfetcho, D J DonoghueAbstract:Direct sample introduction (DSI) or "dirty sample injection" is a rapid, rugged, and inexpensive approach to large volume injection in gas chromatography (GC) for semivolatile analytes such as pesticides. DSI of complex samples such as eggs requires a very selective detection technique, such as tandem mass spectrometry (MS-MS), to determine the analytes among the many semivolatile matrix components that also appear. In DSI, the nonvolatile matrix components that normally would contaminate the GC system in traditional injection methods remain in a disposable microvial, which is removed after every injection. For example, 3 microg of nonvolatile residue typically remained in the microvial after an injection of egg extract using the DSI method. This analytical procedure involves the following: (i) weighing 10 g of egg in a centrifuge tube and adding 2 g of NaCl and 19.3 mL of acetonitrile (MeCN); (ii) blending for 1 min using a probe blender; (iii) centrifuging for 10 min; and (iv) analyzing 10 microL (5 mg of egg equivalent) of the extract using DSI/GC/MS-MS. No sample cleanup or solvent evaporation steps were required to achieve quantitative and confirmatory results with <10 ng/g detection limits for 25 of 43 tested pesticides from several chemical classes. The remaining pesticides gave higher detection limits due to poor fragmentation characteristics in electron impact ionization and/or degradation. Analysis of eggs incurred with chlorpyrifos-methyl showed a similar trend in the results as a more traditional approach.
