The Experts below are selected from a list of 16125 Experts worldwide ranked by ideXlab platform
Daisuke Ueda - One of the best experts on this subject based on the ideXlab platform.
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Low-voltage operation GaAs spike-gate Power FET with high Power-Added Efficiency
IEEE Transactions on Electron Devices, 1997Co-Authors: Tsuyoshi Tanaka, H. Furukawa, H. Takenaka, Tetsuzo Ueda, T. Fukui, Daisuke UedaAbstract:A GaAs Power FET with a spike-gate has been developed for high-Efficiency operation under extremely low supply voltage less than 1.5 V. The spike-gate provides both low on-resistance of 2.2 /spl Omega//mm and high transconductance of 180 mS/mm without reducing the output impedance or increasing the gate resistance. The implemented device achieved an output Power of 31.5 dBm with 70% Power-Added Efficiency at a frequency of 900 MHz. It should be noted that the present device kept PAE of 60% even at a bias of 0.5 V, which is the lowest voltage ever attained.
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High Power-Added Efficiency and low distortion GaAs Power FET employing spike-gate structure
Solid-State Electronics, 1997Co-Authors: H. Furukawa, Tsuyoshi Tanaka, H. Takenaka, Tetsuzo Ueda, T. Fukui, Daisuke UedaAbstract:Abstract A GaAs Power FET employing a spike-gate structure was developed for the high Efficiency and low distortion operation under the extremely low supply voltage of 1.5 V. This spike-gate FET is featured by an unique gate structure that has almost zero effective gate length. The spike-gate provides both the low on-resistance of 2.2Ω mm −1 and the low drain conductance of 5 mS mm −1 . Maximum frequency of oscillation ( f max ) is over 30 GHz that is estimated from S-parameter under the supply voltage of 1.5 V. The decrease of the f max is smaller for the spike-ate FET than for the conventional one as the decrease of supply voltage. In π/4-shift QPSK modulation system, the implemented device achieved the output Power of 31.0 dBM with 52% Power-Added Efficiency and −51 dBc adjacent channel leakage Power at the frequency of 925 MHz under the drain supply voltage of 1.5 V.
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1 5 v operation gaas spike gate Power fet with 65 Power Added Efficiency
International Electron Devices Meeting, 1995Co-Authors: Tsuyoshi Tanaka, H. Furukawa, H. Takenaka, Tetsuzo Ueda, A. Noma, T. Fukui, K. Tateoka, Daisuke UedaAbstract:A GaAs Power FET with a spike-gate has been developed for the high Efficiency operation under the extremely low voltage supply of 1.5 V. The spike-gate provides both the low on-resistance of 2.2 /spl Omega//mm and the high transconductance of 180 mS/mm without reducing the output impedance nor increasing the gate resistance. The implemented device achieved the output Power of 31.5 dBm with 65% Power-Added Efficiency at the frequency of 900 MHz. Sub-quarter micron footprints of the spike-gate were defined by using the phase shift lithography.
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1.5 V-operation GaAs spike-gate Power FET with 65% Power-Added Efficiency
Proceedings of International Electron Devices Meeting, 1Co-Authors: Tsuyoshi Tanaka, H. Furukawa, H. Takenaka, Tetsuzo Ueda, A. Noma, T. Fukui, K. Tateoka, Daisuke UedaAbstract:A GaAs Power FET with a spike-gate has been developed for the high Efficiency operation under the extremely low voltage supply of 1.5 V. The spike-gate provides both the low on-resistance of 2.2 /spl Omega//mm and the high transconductance of 180 mS/mm without reducing the output impedance nor increasing the gate resistance. The implemented device achieved the output Power of 31.5 dBm with 65% Power-Added Efficiency at the frequency of 900 MHz. Sub-quarter micron footprints of the spike-gate were defined by using the phase shift lithography.
Jeong-sun Moon - One of the best experts on this subject based on the ideXlab platform.
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high speed graded channel algan gan hemts with Power Added Efficiency 70 at 30 ghz
Electronics Letters, 2020Co-Authors: Jeong-sun Moon, R. Grabar, J. Wong, M. Antcliffe, E. Arkun, I. Khalaf, Andrea Corrion, J. Chappell, P Chen, Nivedhita VenkatesanAbstract:The authors report on highly scaled 60 nm gate length graded-channel AlGaN/GaN high electron mobility transistors (HEMTs) with a record Power Added Efficiency (PAE) of 75% at 2.1 W/mm Power density at Vdd = 10 V and the PAE of 65% at 3.0 W/mm Power density at 30 GHz at Vdd = 14 V. Under two-tone Power measurement, the graded-channel AlGaN/GaN HEMTs demonstrated similar Power performance with peak PAE >70% at 30 GHz. This novel channel design shows great promise for high-Efficiency millimetre-wave (mmW) Power amplifiers up to 3 W/mm RF Power density operation.
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High-speed graded-channel AlGaN/GaN HEMTs with Power Added Efficiency >70% at 30 GHz
Electronics Letters, 2020Co-Authors: Jeong-sun Moon, Peter Chen, R. Grabar, J. Wong, M. Antcliffe, E. Arkun, I. Khalaf, Andrea Corrion, J. Chappell, Nivedhita VenkatesanAbstract:The authors report on highly scaled 60 nm gate length graded-channel AlGaN/GaN high electron mobility transistors (HEMTs) with a record Power Added Efficiency (PAE) of 75% at 2.1 W/mm Power density at Vdd = 10 V and the PAE of 65% at 3.0 W/mm Power density at 30 GHz at Vdd = 14 V. Under two-tone Power measurement, the graded-channel AlGaN/GaN HEMTs demonstrated similar Power performance with peak PAE >70% at 30 GHz. This novel channel design shows great promise for high-Efficiency millimetre-wave (mmW) Power amplifiers up to 3 W/mm RF Power density operation.
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70 Power Added Efficiency dual gate cascode gan hemts without harmonic tuning
IEEE Electron Device Letters, 2016Co-Authors: Jeong-sun Moon, Robert Grabar, D. F. Brown, D. Wong, Helen Fung, Peter Chen, Jongchan Kang, Ivan Alvaradorodriguez, A Schmitz, S. KimAbstract:We report the state-of-the-art performance of deep-submicrometer gate length dual-gate GaN HEMTs and cascode GaN HEMTs with $10\times $ reduced gate-to-drain feedback capacitance compared with single-gate GaN HEMTs. With 150-nm gate length field-plated gate structures, these GaN HEMTs demonstrated improvement of small-signal gain by 10 dB, compared with single-gate GaN HEMTs. Large-signal load-pull measurements showed peak Power-Added-Efficiency (PAE) of 71%–74% without harmonic tuning at 10 GHz, up to a measured continuous-wave output Power level of 2.3–2.5 W. The 74% PAE is very close to a theoretical maximum PAE of 78.5% without harmonic tuning. Compared with single-gate GaN HEMTs, both the dual-gate and cascode GaN HEMTs offer $\sim 10$ % improvement in peak PAE at the output Power of 2.3–2.5 W.
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>70% Power-Added-Efficiency Dual-Gate, Cascode GaN HEMTs Without Harmonic Tuning
IEEE Electron Device Letters, 2016Co-Authors: Jeong-sun Moon, Robert Grabar, D. F. Brown, Ivan Alvarado-rodriguez, D. Wong, Adele E. Schmitz, Helen Fung, Peter Chen, Jongchan Kang, S. KimAbstract:We report the state-of-the-art performance of deep-submicrometer gate length dual-gate GaN HEMTs and cascode GaN HEMTs with $10\times $ reduced gate-to-drain feedback capacitance compared with single-gate GaN HEMTs. With 150-nm gate length field-plated gate structures, these GaN HEMTs demonstrated improvement of small-signal gain by 10 dB, compared with single-gate GaN HEMTs. Large-signal load-pull measurements showed peak Power-Added-Efficiency (PAE) of 71%–74% without harmonic tuning at 10 GHz, up to a measured continuous-wave output Power level of 2.3–2.5 W. The 74% PAE is very close to a theoretical maximum PAE of 78.5% without harmonic tuning. Compared with single-gate GaN HEMTs, both the dual-gate and cascode GaN HEMTs offer $\sim 10$ % improvement in peak PAE at the output Power of 2.3–2.5 W.
Tsuyoshi Tanaka - One of the best experts on this subject based on the ideXlab platform.
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Low-voltage operation GaAs spike-gate Power FET with high Power-Added Efficiency
IEEE Transactions on Electron Devices, 1997Co-Authors: Tsuyoshi Tanaka, H. Furukawa, H. Takenaka, Tetsuzo Ueda, T. Fukui, Daisuke UedaAbstract:A GaAs Power FET with a spike-gate has been developed for high-Efficiency operation under extremely low supply voltage less than 1.5 V. The spike-gate provides both low on-resistance of 2.2 /spl Omega//mm and high transconductance of 180 mS/mm without reducing the output impedance or increasing the gate resistance. The implemented device achieved an output Power of 31.5 dBm with 70% Power-Added Efficiency at a frequency of 900 MHz. It should be noted that the present device kept PAE of 60% even at a bias of 0.5 V, which is the lowest voltage ever attained.
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High Power-Added Efficiency and low distortion GaAs Power FET employing spike-gate structure
Solid-State Electronics, 1997Co-Authors: H. Furukawa, Tsuyoshi Tanaka, H. Takenaka, Tetsuzo Ueda, T. Fukui, Daisuke UedaAbstract:Abstract A GaAs Power FET employing a spike-gate structure was developed for the high Efficiency and low distortion operation under the extremely low supply voltage of 1.5 V. This spike-gate FET is featured by an unique gate structure that has almost zero effective gate length. The spike-gate provides both the low on-resistance of 2.2Ω mm −1 and the low drain conductance of 5 mS mm −1 . Maximum frequency of oscillation ( f max ) is over 30 GHz that is estimated from S-parameter under the supply voltage of 1.5 V. The decrease of the f max is smaller for the spike-ate FET than for the conventional one as the decrease of supply voltage. In π/4-shift QPSK modulation system, the implemented device achieved the output Power of 31.0 dBM with 52% Power-Added Efficiency and −51 dBc adjacent channel leakage Power at the frequency of 925 MHz under the drain supply voltage of 1.5 V.
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1 5 v operation gaas spike gate Power fet with 65 Power Added Efficiency
International Electron Devices Meeting, 1995Co-Authors: Tsuyoshi Tanaka, H. Furukawa, H. Takenaka, Tetsuzo Ueda, A. Noma, T. Fukui, K. Tateoka, Daisuke UedaAbstract:A GaAs Power FET with a spike-gate has been developed for the high Efficiency operation under the extremely low voltage supply of 1.5 V. The spike-gate provides both the low on-resistance of 2.2 /spl Omega//mm and the high transconductance of 180 mS/mm without reducing the output impedance nor increasing the gate resistance. The implemented device achieved the output Power of 31.5 dBm with 65% Power-Added Efficiency at the frequency of 900 MHz. Sub-quarter micron footprints of the spike-gate were defined by using the phase shift lithography.
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1.5 V-operation GaAs spike-gate Power FET with 65% Power-Added Efficiency
Proceedings of International Electron Devices Meeting, 1Co-Authors: Tsuyoshi Tanaka, H. Furukawa, H. Takenaka, Tetsuzo Ueda, A. Noma, T. Fukui, K. Tateoka, Daisuke UedaAbstract:A GaAs Power FET with a spike-gate has been developed for the high Efficiency operation under the extremely low voltage supply of 1.5 V. The spike-gate provides both the low on-resistance of 2.2 /spl Omega//mm and the high transconductance of 180 mS/mm without reducing the output impedance nor increasing the gate resistance. The implemented device achieved the output Power of 31.5 dBm with 65% Power-Added Efficiency at the frequency of 900 MHz. Sub-quarter micron footprints of the spike-gate were defined by using the phase shift lithography.
H. Furukawa - One of the best experts on this subject based on the ideXlab platform.
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Low-voltage operation GaAs spike-gate Power FET with high Power-Added Efficiency
IEEE Transactions on Electron Devices, 1997Co-Authors: Tsuyoshi Tanaka, H. Furukawa, H. Takenaka, Tetsuzo Ueda, T. Fukui, Daisuke UedaAbstract:A GaAs Power FET with a spike-gate has been developed for high-Efficiency operation under extremely low supply voltage less than 1.5 V. The spike-gate provides both low on-resistance of 2.2 /spl Omega//mm and high transconductance of 180 mS/mm without reducing the output impedance or increasing the gate resistance. The implemented device achieved an output Power of 31.5 dBm with 70% Power-Added Efficiency at a frequency of 900 MHz. It should be noted that the present device kept PAE of 60% even at a bias of 0.5 V, which is the lowest voltage ever attained.
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High Power-Added Efficiency and low distortion GaAs Power FET employing spike-gate structure
Solid-State Electronics, 1997Co-Authors: H. Furukawa, Tsuyoshi Tanaka, H. Takenaka, Tetsuzo Ueda, T. Fukui, Daisuke UedaAbstract:Abstract A GaAs Power FET employing a spike-gate structure was developed for the high Efficiency and low distortion operation under the extremely low supply voltage of 1.5 V. This spike-gate FET is featured by an unique gate structure that has almost zero effective gate length. The spike-gate provides both the low on-resistance of 2.2Ω mm −1 and the low drain conductance of 5 mS mm −1 . Maximum frequency of oscillation ( f max ) is over 30 GHz that is estimated from S-parameter under the supply voltage of 1.5 V. The decrease of the f max is smaller for the spike-ate FET than for the conventional one as the decrease of supply voltage. In π/4-shift QPSK modulation system, the implemented device achieved the output Power of 31.0 dBM with 52% Power-Added Efficiency and −51 dBc adjacent channel leakage Power at the frequency of 925 MHz under the drain supply voltage of 1.5 V.
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1 5 v operation gaas spike gate Power fet with 65 Power Added Efficiency
International Electron Devices Meeting, 1995Co-Authors: Tsuyoshi Tanaka, H. Furukawa, H. Takenaka, Tetsuzo Ueda, A. Noma, T. Fukui, K. Tateoka, Daisuke UedaAbstract:A GaAs Power FET with a spike-gate has been developed for the high Efficiency operation under the extremely low voltage supply of 1.5 V. The spike-gate provides both the low on-resistance of 2.2 /spl Omega//mm and the high transconductance of 180 mS/mm without reducing the output impedance nor increasing the gate resistance. The implemented device achieved the output Power of 31.5 dBm with 65% Power-Added Efficiency at the frequency of 900 MHz. Sub-quarter micron footprints of the spike-gate were defined by using the phase shift lithography.
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1.5 V-operation GaAs spike-gate Power FET with 65% Power-Added Efficiency
Proceedings of International Electron Devices Meeting, 1Co-Authors: Tsuyoshi Tanaka, H. Furukawa, H. Takenaka, Tetsuzo Ueda, A. Noma, T. Fukui, K. Tateoka, Daisuke UedaAbstract:A GaAs Power FET with a spike-gate has been developed for the high Efficiency operation under the extremely low voltage supply of 1.5 V. The spike-gate provides both the low on-resistance of 2.2 /spl Omega//mm and the high transconductance of 180 mS/mm without reducing the output impedance nor increasing the gate resistance. The implemented device achieved the output Power of 31.5 dBm with 65% Power-Added Efficiency at the frequency of 900 MHz. Sub-quarter micron footprints of the spike-gate were defined by using the phase shift lithography.
Tetsuzo Ueda - One of the best experts on this subject based on the ideXlab platform.
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Low-voltage operation GaAs spike-gate Power FET with high Power-Added Efficiency
IEEE Transactions on Electron Devices, 1997Co-Authors: Tsuyoshi Tanaka, H. Furukawa, H. Takenaka, Tetsuzo Ueda, T. Fukui, Daisuke UedaAbstract:A GaAs Power FET with a spike-gate has been developed for high-Efficiency operation under extremely low supply voltage less than 1.5 V. The spike-gate provides both low on-resistance of 2.2 /spl Omega//mm and high transconductance of 180 mS/mm without reducing the output impedance or increasing the gate resistance. The implemented device achieved an output Power of 31.5 dBm with 70% Power-Added Efficiency at a frequency of 900 MHz. It should be noted that the present device kept PAE of 60% even at a bias of 0.5 V, which is the lowest voltage ever attained.
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High Power-Added Efficiency and low distortion GaAs Power FET employing spike-gate structure
Solid-State Electronics, 1997Co-Authors: H. Furukawa, Tsuyoshi Tanaka, H. Takenaka, Tetsuzo Ueda, T. Fukui, Daisuke UedaAbstract:Abstract A GaAs Power FET employing a spike-gate structure was developed for the high Efficiency and low distortion operation under the extremely low supply voltage of 1.5 V. This spike-gate FET is featured by an unique gate structure that has almost zero effective gate length. The spike-gate provides both the low on-resistance of 2.2Ω mm −1 and the low drain conductance of 5 mS mm −1 . Maximum frequency of oscillation ( f max ) is over 30 GHz that is estimated from S-parameter under the supply voltage of 1.5 V. The decrease of the f max is smaller for the spike-ate FET than for the conventional one as the decrease of supply voltage. In π/4-shift QPSK modulation system, the implemented device achieved the output Power of 31.0 dBM with 52% Power-Added Efficiency and −51 dBc adjacent channel leakage Power at the frequency of 925 MHz under the drain supply voltage of 1.5 V.
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1 5 v operation gaas spike gate Power fet with 65 Power Added Efficiency
International Electron Devices Meeting, 1995Co-Authors: Tsuyoshi Tanaka, H. Furukawa, H. Takenaka, Tetsuzo Ueda, A. Noma, T. Fukui, K. Tateoka, Daisuke UedaAbstract:A GaAs Power FET with a spike-gate has been developed for the high Efficiency operation under the extremely low voltage supply of 1.5 V. The spike-gate provides both the low on-resistance of 2.2 /spl Omega//mm and the high transconductance of 180 mS/mm without reducing the output impedance nor increasing the gate resistance. The implemented device achieved the output Power of 31.5 dBm with 65% Power-Added Efficiency at the frequency of 900 MHz. Sub-quarter micron footprints of the spike-gate were defined by using the phase shift lithography.
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1.5 V-operation GaAs spike-gate Power FET with 65% Power-Added Efficiency
Proceedings of International Electron Devices Meeting, 1Co-Authors: Tsuyoshi Tanaka, H. Furukawa, H. Takenaka, Tetsuzo Ueda, A. Noma, T. Fukui, K. Tateoka, Daisuke UedaAbstract:A GaAs Power FET with a spike-gate has been developed for the high Efficiency operation under the extremely low voltage supply of 1.5 V. The spike-gate provides both the low on-resistance of 2.2 /spl Omega//mm and the high transconductance of 180 mS/mm without reducing the output impedance nor increasing the gate resistance. The implemented device achieved the output Power of 31.5 dBm with 65% Power-Added Efficiency at the frequency of 900 MHz. Sub-quarter micron footprints of the spike-gate were defined by using the phase shift lithography.