The Experts below are selected from a list of 360 Experts worldwide ranked by ideXlab platform
Yuan Ping Feng - One of the best experts on this subject based on the ideXlab platform.
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growth of Si Nanowires by thermal evaporation
Nanotechnology, 2005Co-Authors: X Wu, Yuan Ping FengAbstract:Si Nanowires have been produced in high yield on Si substrate with the absence of a catalyst by thermal evaporation at high temperature. The self-induced growth of Si Nanowires suggests that a catalyst should be not essential. TransmisSion electron microscopic investigation shows that the Nanowires, with a diameter ranging from 10 to 100 nm and length up to a few hundred microns, are crystalline or amorphous. The self-induced solid–liquid–solid model and oxygen-asSisted vapour–solid mode are employed to explain the results. Raman spectroscopy shows an asymmetric peak around 512 cm−1, with a deviation of 9 cm−1 from that of the bulk crystalline Si. XRD and TEM were used to characterize the Si Nanowires. The effects of growth conditions on quality and production were investigated.
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growth of Si Nanowires by thermal evaporation
Nanotechnology, 2005Co-Authors: X Wu, Yuan Ping FengAbstract:Si Nanowires have been produced in high yield on Si substrate with the absence of a catalyst by thermal evaporation at high temperature. The self-induced growth of Si Nanowires suggests that a catalyst should be not essential. TransmisSion electron microscopic investigation shows that the Nanowires, with a diameter ranging from 10 to 100 nm and length up to a few hundred microns, are crystalline or amorphous. The self-induced solid–liquid–solid model and oxygen-asSisted vapour–solid mode are employed to explain the results. Raman spectroscopy shows an asymmetric peak around 512 cm−1, with a deviation of 9 cm−1 from that of the bulk crystalline Si. XRD and TEM were used to characterize the Si Nanowires. The effects of growth conditions on quality and production were investigated.
Lincoln J Lauhon - One of the best experts on this subject based on the ideXlab platform.
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strain energy release in bent semiconductor Nanowires occurring by polygonization or nanocrack formation
ACS Nano, 2019Co-Authors: Zhiyuan Sun, Lincoln J Lauhon, Chunyi Huang, Jinglong Guo, Jason T Dong, Robert F Klie, David N SeidmanAbstract:Strain engineering of semiconductors is used to modulate carrier mobility, tune the energy bandgap, and drive growth of self-assembled nanostructures. Understanding strain-energy relaxation mechanisms including phase transformations, dislocation nucleation and migration, and fracturing is essential to both exploit this degree of freedom and avoid degradation of carrier lifetime and mobility, particularly in prestrained electronic devices and flexible electronics that undergo large changes in strain during operation. Raman spectroscopy, high-resolution transmisSion electron microscopy, and electron diffraction are utilized to identify strain-energy release mechanisms of bent diamond-cubic Silicon (Si) and zinc-blende GaAs Nanowires, which were elastically strained to >6% at room temperature and then annealed at an elevated temperature to activate relaxation mechanisms. High-temperature annealing of bent Si-Nanowires leads to the nucleation, glide, and climb of dislocations, which align themselves to form grain boundaries, thereby reducing the strain energy. Herein, Si Nanowires are reported to undergo polygonization, which is the formation of polygonal-shaped grains separated by grain boundaries conSisting of aligned edge dislocations. Furthermore, strain is shown to drive dopant diffuSion. In contrast to the behavior of Si, GaAs Nanowires release strain energy by forming nanocracks in regions of tenSile strain due to the weakening of As-bonds. These inSights into the relaxation behavior of highly strained crystals can inform the deSign of nanoelectronic devices and provide guidance on mitigating degradation.
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Strain-Energy Release in Bent Semiconductor Nanowires Occurring by Polygonization or Nanocrack Formation
2019Co-Authors: Zhiyuan Sun, Lincoln J Lauhon, Chunyi Huang, Jinglong Guo, Jason T Dong, Robert F Klie, David N SeidmanAbstract:Strain engineering of semiconductors is used to modulate carrier mobility, tune the energy bandgap, and drive growth of self-assembled nanostructures. Understanding strain-energy relaxation mechanisms including phase transformations, dislocation nucleation and migration, and fracturing is essential to both exploit this degree of freedom and avoid degradation of carrier lifetime and mobility, particularly in prestrained electronic devices and flexible electronics that undergo large changes in strain during operation. Raman spectroscopy, high-resolution transmisSion electron microscopy, and electron diffraction are utilized to identify strain-energy release mechanisms of bent diamond-cubic Silicon (Si) and zinc-blende GaAs Nanowires, which were elastically strained to >6% at room temperature and then annealed at an elevated temperature to activate relaxation mechanisms. High-temperature annealing of bent Si-Nanowires leads to the nucleation, glide, and climb of dislocations, which align themselves to form grain boundaries, thereby reducing the strain energy. Herein, Si Nanowires are reported to undergo polygonization, which is the formation of polygonal-shaped grains separated by grain boundaries conSisting of aligned edge dislocations. Furthermore, strain is shown to drive dopant diffuSion. In contrast to the behavior of Si, GaAs Nanowires release strain energy by forming nanocracks in regions of tenSile strain due to the weakening of As-bonds. These inSights into the relaxation behavior of highly strained crystals can inform the deSign of nanoelectronic devices and provide guidance on mitigating degradation
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obtaining uniform dopant distributions in vls grown Si Nanowires
Nano Letters, 2011Co-Authors: Elad Koren, Jerome K Hyun, Uri Givan, Eric R Hemesath, Lincoln J Lauhon, Y RosenwaksAbstract:Semiconducting Nanowires grown by the vapor−liquid−solid method commonly develop nonuniform doping profiles both along the growth axis and radially due to unintentional surface doping and diffuSion of the dopants from the nanowire surface to core during syntheSis. We demonstrate two approaches to mitigate nonuniform doping in phosphorus-doped Si Nanowires grown by the vapor−liquid−solid process. First, the growth conditions can be modified to suppress active surface doping. Second, thermal annealing following growth can be used to produce more uniform doping profiles. Kelvin probe force microscopy and scanning photocurrent microscopy were used to measure the radial and the longitudinal active dopant distribution, respectively. Doping concentration variations were reduced by 2 orders of magnitude in both annealed Nanowires and those for which surface doping was suppressed.
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scanning photocurrent microscopy analySis of Si nanowire field effect tranSistors fabricated by surface etching of the channel
Nano Letters, 2009Co-Authors: Jonathan E. Allen, Eric R Hemesath, Lincoln J LauhonAbstract:High-performance field-effect tranSistors were fabricated by etching the channel regions of surface-doped Si Nanowires. On/off ratios of 106 and field effect mobilities up to 525 cm2/(V·s) represent Significant improvements over tranSistors fabricated from uniformly doped n-Si Nanowires. AnalySis by scanning photocurrent microscopy (SPCM) confirmed that the devices function Similarly to traditional metal-oxide semiconductor field-effect tranSistors; in accumulation, the device current is controlled by channel conductance modulation, while n+−n junctions determine subthreshold characteristics as the channel is depleted. The principles of operation and the drain current saturation mechanisms were investigated by correlating current versus voltage data with integrated photocurrent profiles from SPCM.
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High-resolution detection of Au catalyst atoms in Si Nanowires
Nature Nanotechnology, 2008Co-Authors: Jonathan E. Allen, Eric R Hemesath, Daniel E. Perea, Jessica L. Lensch-falk, Feng Yin, Mhairi H. Gass, Peng Wang, Andrew L. Bleloch, Richard E. Palmer, Lincoln J LauhonAbstract:The potential for the metal nanocatalyst to contaminate vapour–liquid–solid grown semiconductor Nanowires has been a long-standing concern, because the most common catalyst material, Au, is highly detrimental to the performance of minority carrier electronic devices. We have detected Single Au atoms in Si Nanowires grown uSing Au nanocatalyst particles in a vapour–liquid–solid process. USing high-angle annular dark-field scanning transmisSion electron microscopy, Au atoms were observed in higher numbers than expected from a Simple extrapolation of the bulk solubility to the low growth temperature. Direct measurements of the minority carrier diffuSion length versus nanowire diameter, however, demonstrate that surface recombination controls minority carrier transport in as-grown n-type Nanowires; the influence of Au is negligible. These results advance the quantitative correlation of atomic-scale structure with the properties of nanomaterials and can provide essential guidance to the development of nanowire-based device technologies.
Frances M Ross - One of the best experts on this subject based on the ideXlab platform.
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strain and stability of ultrathin ge layers in Si ge Si axial heterojunction Nanowires
Nano Letters, 2015Co-Authors: Chengyen Wen, M C Reuter, Eric A Stach, Frances M RossAbstract:The formation of abrupt Si/Ge heterointerfaces in Nanowires presents useful posSibilities for bandgap engineering. We grow Si Nanowires containing thick Ge layers and sub-1 nm thick Ge “quantum wells” and measure the interfacial strain fields uSing geometric phase analySis. Narrow Ge layers show radial compresSive strains of several percent, while stress at the Si/Ge interface causes lattice rotation. High strains can be achieved in these heterostructures, but we show that they are unstable to interdiffuSion.
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diameter independent kinetics in the vapor liquid solid growth of Si Nanowires
Physical Review Letters, 2006Co-Authors: S Kodambaka, Jerry Tersoff, M C Reuter, Frances M RossAbstract:We examine individual Si Nanowires grown by the vapor-liquid-solid mechanism, uSing real-time in Situ ultra high vacuum transmisSion electron microscopy. By directly observing Au-catalyzed growth of Si wires from diSilane, we show that the growth rate is independent of wire diameter, contrary to the expected behavior. Our measurements show that the unique rate-limiting step here is the irreverSible, kinetically limited, dissociative adsorption of diSilane directly on the catalyst surface. We also identify a novel dependence of growth rate on wire taper.
X Wu - One of the best experts on this subject based on the ideXlab platform.
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growth of Si Nanowires by thermal evaporation
Nanotechnology, 2005Co-Authors: X Wu, Yuan Ping FengAbstract:Si Nanowires have been produced in high yield on Si substrate with the absence of a catalyst by thermal evaporation at high temperature. The self-induced growth of Si Nanowires suggests that a catalyst should be not essential. TransmisSion electron microscopic investigation shows that the Nanowires, with a diameter ranging from 10 to 100 nm and length up to a few hundred microns, are crystalline or amorphous. The self-induced solid–liquid–solid model and oxygen-asSisted vapour–solid mode are employed to explain the results. Raman spectroscopy shows an asymmetric peak around 512 cm−1, with a deviation of 9 cm−1 from that of the bulk crystalline Si. XRD and TEM were used to characterize the Si Nanowires. The effects of growth conditions on quality and production were investigated.
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growth of Si Nanowires by thermal evaporation
Nanotechnology, 2005Co-Authors: X Wu, Yuan Ping FengAbstract:Si Nanowires have been produced in high yield on Si substrate with the absence of a catalyst by thermal evaporation at high temperature. The self-induced growth of Si Nanowires suggests that a catalyst should be not essential. TransmisSion electron microscopic investigation shows that the Nanowires, with a diameter ranging from 10 to 100 nm and length up to a few hundred microns, are crystalline or amorphous. The self-induced solid–liquid–solid model and oxygen-asSisted vapour–solid mode are employed to explain the results. Raman spectroscopy shows an asymmetric peak around 512 cm−1, with a deviation of 9 cm−1 from that of the bulk crystalline Si. XRD and TEM were used to characterize the Si Nanowires. The effects of growth conditions on quality and production were investigated.
Joan M Redwing - One of the best experts on this subject based on the ideXlab platform.
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fabrication and electrical properties of Si Nanowires syntheSized by al catalyzed vapor liquid solid growth
Nano Letters, 2009Co-Authors: Xiaojun Weng, Joan M Redwing, Chad Eichfeld, Thomas R Swisher, S E Mohney, Youssef M HabibAbstract:The syntheSis of epitaxially oriented Si Nanowires at high growth rates (>1 μm/min) was demonstrated on (111) Si substrates uSing Al as the catalyst. The use of high H2 and SiH4 partial pressures was found to be effective at reducing problems associated with Al oxidation and nanowire nucleation, enabling growth of high aspect ratio structures at temperatures ranging from 500 to 600 °C with minimal tapering of the diameter. Because of the high growth rate observed, the Al catalyst is believed to be in the liquid state during the growth. Four-point reSistance measurements and back-gated current−voltage measurements indicate that the wires are p-type with an average reSistivity of 0.01 ± 0.004 Ω-cm. These results suggest that Al is incorporated into the Si Nanowires under these conditions at concentrations higher than the solubility limit (5−6 × 1018 cm−3) for Al in Si at 550 °C. This work demonstrates that Al can serve as both an effective catalyst and p-type dopant for the growth of Si Nanowires.
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Silicon nanowire array photoelectrochemical cells
Journal of the American Chemical Society, 2007Co-Authors: Adrian P Goodey, Sarah M Eichfeld, Kokkeong Lew, Joan M Redwing, Thomas E MalloukAbstract:Silicon nanowire arrays were grown by vapor−liquid−solid growth from SiH4 vapor at 500 °C, and tested as photocathodes in [Ru(bpy)3]2+ (bpy = 2,2‘-bipyridyl)/acetonitrile solutions. Si Nanowires were grown in anodic aluminum oxide membranes by first electroplating 50 μm long Co wires capped with 250 nm gold segments in the pores and then reacting with SiH4. The resulting Si Nanowires protruded 10−15 μm beyond the top surface of the membrane but were degeneratively doped, most likely by Al from the membrane. Nanowires grown in the same manner on Si(111)/Au substrates could be controllably doped p-type by addition of trimethylboron. These p-Si nanowire arrays gave a photovoltage of 220 mV in [Ru(bpy)3]2+ solution when illuminated by white light.
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effect of diborane on the microstructure of boron doped Silicon Nanowires
Journal of Crystal Growth, 2005Co-Authors: Ling Pan, Kokkeong Lew, Joan M Redwing, Elizabeth C DickeyAbstract:Abstract Boron-doped Silicon (Si) Nanowires, with nominal diameters of 80 nm, were grown via the vapor–liquid–solid (VLS) mechanism uSing gold (Au) as a catalyst and Silane (SiH 4 ) and diborane (B 2 H 6 ) as precursors. The microstructure of the Nanowires was studied by scanning electron microscopy, transmisSion electron microscopy and electron energy-loss spectroscopy. At lower B 2 H 6 partial pressure and thus lower doping levels (⩽1×10 18 cm −3 ), most of the boron-doped Si Nanowires exhibited high crystallinity. At higher B 2 H 6 partial pressure (∼2×10 19 cm −3 doping level), the majority of the wires exhibited a core–shell structure with an amorphous Si shell (20–30 nm thick) surrounding a crystalline Si core. Au nanoparticles on the outer surface of the Nanowires were also observed in structures grown with high B/Si gas ratios. The structural changes are believed to result from an increase in the rate of Si thin-film depoSition on the outer surface of the nanowire at high B 2 H 6 partial pressure, which produces the amorphous coating and also causes an instability at the liquid/solid interface resulting in a loss of Au during nanowire growth.
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growth characteristics of Silicon Nanowires syntheSized by vapor liquid solid growth in nanoporous alumina templates
Journal of Crystal Growth, 2003Co-Authors: Kokkeong Lew, Joan M RedwingAbstract:Abstract The fabrication of Si Nanowires has been demonstrated uSing a combination of template-directed syntheSis and vapor–liquid–solid (VLS) growth. The use of nanoporous alumina membranes for VLS growth provides control over nanowire diameter while also enabling the production of Single crystal material. An investigation of the growth characteristics of Si Nanowires over a temperature range from 400°C to 600°C, and over a SiH 4 partial pressure range from 0.13 to 0.65 Torr was carried out. The length of Si Nanowires was found to be linearly dependent on growth time over this range of conditions. The nanowire growth rate increased from 0.068 μm/min at 400°C to 0.52 μm/min at 500°C at a constant SiH 4 partial pressure of 0.65 Torr. At temperatures greater than 500°C, Si depoSited on the top surface and pore walls of the membrane thereby reducing the nanowire growth rate. The growth rate versus temperature data was used to calculate an activation energy of 22 kcal/mol for the nanowire growth process. This activation energy is believed to be associated with the decompoSition of SiH 4 on the Au–Si liquid surface, which is conSidered to be the rate-determining step in the VLS growth process.
