The Experts below are selected from a list of 279 Experts worldwide ranked by ideXlab platform
Juin J. Liou - One of the best experts on this subject based on the ideXlab platform.
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Augmented DTSCR With Fast Turn-On Speed for Nanoscale ESD Protection Applications
IEEE Transactions on Electron Devices, 2020Co-Authors: Wenqiang Song, Zhiwei Liu, Jizhi Liu, Juin J. Liou, Fei Hou, Xuanlin Xiong, Yang LiuAbstract:In this brief, two novel diode-triggered Silicon-Controlled Rectifiers (DTSCRs) with fast turn-on speed have been presented. By embedding current gain amplifier modules (i.e., Sziklai pair and Darlington pair) into the conventional DTSCR, the current gain of parasitic bipolar junction transistors (BJTs) on the Silicon-Controlled Rectifier (SCR) path in the new devices becomes much larger than that of the conventional counterpart, thus resulting in a faster turn-on speed and better quasi-static ${I}$ – ${V}$ characteristics. As such, the quasi-static triggering characteristic of the new DTSCR improves by 80%, and the turn-on speed improves by 42%–93% for different current levels.
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a compact and self isolated dual directional silicon controlled Rectifier scr for esd applications
IEEE Transactions on Device and Materials Reliability, 2019Co-Authors: Zhiwei Liu, Jizhi Liu, Jun Wang, Juin J. LiouAbstract:In this paper, a compact and self-isolated dual directional Silicon-Controlled Rectifier (CSDDSCR) developed in a single N-well has been proposed and demonstrated. Without using the P-well, the N-type isolation structure as well as an auxiliary trigger component, which are normally required in the traditional DDSCR, the novel CSDDSCR possesses a very high area-efficiency and robustness of ~8.81 V / $\mu$ m2. It is also shown that the CSDDSCR preserves a lower trigger voltage as 10 V, an adjustable holding voltage from 3.32 to 8.79 V under the TLP test, a smaller overshoot voltage of ~19 V at 2 A VFTLP stress, as well as an extremely low leakage current of ~94 pA measured at 3.3 V, making it a superior candidate for electrostatic discharge protection in the 3.3 V/5 V CMOS processes. Moreover, a holding voltage reversal effect has also been discovered and explained with TCAD simulation.
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New Diode-Triggered Silicon-Controlled Rectifier for Robust Electrostatic Discharge Protection at High Temperatures
IEEE Transactions on Electron Devices, 2019Co-Authors: Fei Hou, Zhiwei Liu, Jizhi Liu, Wen Huang, Tianxun Gong, Juin J. LiouAbstract:The diode-triggered Silicon-Controlled Rectifier (DTSCR) is an important device for the electrostatic discharge (ESD) protection of low-voltage integrated circuits, and its trigger voltage is determined by the forward turn-on voltage of diode string and the voltage drops on the parasitic resistors of metal interconnects. For the conventional DTSCR, the voltage drops on the parasitic resistors are often negligible so its triggering voltage is mainly determined by the forward turn-on voltage of diode string, which decreases with increasing temperature due to the inherited negative temperature coefficient. In this paper, an improved and novel device called thermal-stable DTSCR (TSDTSCR) is proposed to offer an improved ESD protection stability at elevated temperatures. This is done by changing and optimizing the 3-D layout. In particular, the experimental results show that the trigger voltage drop of the TSDTSCR can be reduced to 13.5% at 125 °C, comparing to 27.18% of the DTSCR. The holding voltage of the TSDTSCR is also more stable than that of the DTSCR over a wide range of temperatures.
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Heterogeneous stacking silicon controlled Rectifier design with improved ESD performance
2017 IEEE 24th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), 2017Co-Authors: Aihua Dong, Juin J. Liou, Wei Liang, Javier A. Salcedo, Jean-jacques Hajjar, Kalpathy B. SundaramAbstract:A novel design consisting of a heterogeneous stacking of silicon control Rectifier is proposed in this paper. A latch-up free design in a high voltage BCDMOS process is demonstrated. Structures based on this method are compared with conventionally stacked SCR structure. Comprehensive characterization, including DC and transmission line pulsing (TLP), is undertaken to demonstrate the performance.
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very small snapback silicon controlled Rectifier for electrostatic discharge protection in 28 nm processing
Microelectronics Reliability, 2016Co-Authors: Weihuai Wang, Juin J. Liou, Shurong Dong, Hao Jin, Wei Guo, Wei Liang, Yan HanAbstract:Abstract A novel Silicon-Controlled Rectifier (SCR)-based device with very small snapback is proposed in this paper. New features including an embedded gate-to-VDD PMOS (GDPMOS) and lateral n-p-n BJT are used to achieve low trigger and high holding voltages suitable for electrostatic discharge (ESD) protection of 28-nm CMOS technology with very narrow ESD operation windows. Measured results show an ESD operation window of less than 1 V. TCAD simulation is also carried out to demonstrate the underlying physical mechanisms.
Mingdou Ker - One of the best experts on this subject based on the ideXlab platform.
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Design of Fin-Diode-Triggered Rotated Silicon-Controlled Rectifier for High- Speed Digital Application in 16-nm FinFET Process
IEEE Transactions on Electron Devices, 2020Co-Authors: Rong-kun Chang, Chun-yu Lin, Mingdou KerAbstract:The FinFET architecture has widely been used in the digital circuit application, due to the good short channel effect control and driving current boost. However, the worse thermal dispassion and smaller effective silicon volume would cause the significant impacts during the circuits under electrostatic discharge (ESD) event. Thus, the ESD protection device should be installed into the high-speed digital circuit to enhance the ESD robustness. To avoid the effect of circuit performance, the parasitic capacitance of ESD device must be as low as possible. In this article, two types of Fin-diode-triggered rotated Silicon-Controlled Rectifier (SCR) with dual ESD current path have been proposed and verified in a 16-nm FinFET CMOS process. The proposed devices have better current-handling capability, sufficiently low parasitic, compact layout area, and low leakage current.
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Diode-Triggered Silicon-Controlled Rectifier With Reduced Voltage Overshoot for CDM ESD Protection
IEEE Transactions on Device and Materials Reliability, 2012Co-Authors: Wenyi Chen, Elyse Rosenbaum, Mingdou KerAbstract:Diode-triggered Silicon-Controlled Rectifiers (DTSCRs) are used for on-chip electrostatic discharge protection. The role of the trigger diode string in determining the transient voltage overshoot is investigated using a very fast transmission line pulse. A DTSCR containing only poly-bound trigger diodes has a voltage overshoot of just 1.5 V at 7 A, which is significantly less than what is found with STI-bound diodes. A DTSCR with only STI-bound trigger diodes has a lower leakage current. Therefore, DTSCRs with different trigger diode configurations may be suitable for different applications, e.g., high speed or low power.
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improving safe operating area of nldmos array with embedded silicon controlled Rectifier for esd protection in a 24 v bcd process
IEEE Transactions on Electron Devices, 2011Co-Authors: Wenyi Chen, Mingdou KerAbstract:In high-voltage technologies, Silicon-Controlled Rectifier (SCR) is usually embedded in output arrays to provide a robust and self-protected capability against electrostatic discharge (ESD). Although the embedded SCR has been proven as an excellent approach to increasing ESD robustness, mistriggering of the embedded SCR during normal circuit operating conditions can bring other application reliability concerns. In particular, the safe operating area (SOA) of output arrays due to SCR insertion has been seldom evaluated. In this paper, the impact of embedding SCR to the electrical SOA (eSOA) of an n-channel LDMOS (nLDMOS) array has been investigated in a 24-V bipolar CMOS-DMOS process. Experimental results showed that the nLDMOS array suffers substantial degradation on eSOA due to embedded SCR. Design approaches, including a new proposed poly-bending (PB) layout, were proposed and verified in this paper to widen the eSOA of the nLDMOS array with embedded SCR. Both the high ESD robustness and the improved SOA of circuit operation can be achieved by the new proposed PB layout in the nLDMOS array.
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study of board level noise filters to prevent transient induced latchup in cmos integrated circuits during emc esd test
International Symposium on Electromagnetic Compatibility, 2006Co-Authors: Shengfu Hsu, Mingdou KerAbstract:Different types of board-level noise filters are evaluated for their effectiveness to improve the immunity of CMOS ICs against transient-induced latchup (TLU) under system-level electrostatic discharge (ESD) test. By choosing proper components in each noise filter network, the TLU immunity of CMOS ICs can be greatly improved. All the experimental evaluations have been verified in test chips with the silicon controlled Rectifier (SCR) fabricated in a 0.25-/spl mu/m CMOS technology. Some of such board-level solutions can be further integrated into the chip design to effectively improve TLU immunity of CMOS IC products.
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Dummy-gate structure to improve turn-on speed of Silicon-Controlled Rectifier (SCR) device for effective electrostatic discharge (ESD) protection
Japanese Journal of Applied Physics, 2003Co-Authors: Mingdou Ker, Kuo Chun HsuAbstract:Turn-on speed is the main concern for on-chip electrostatic discharge (ESD) protection device, especially in deep submicron complementary metal-oxide semiconductors (CMOS) processes with ultra-thin gate oxide. A novel dummy-gate-blocking Silicon-Controlled Rectifier (SCR) device with substrate-triggered technique is proposed to improve the turn-on speed of SCR device for using in on-chip ESD protection circuit to effectively protect the much thinner gate oxide. From the experimental results, the switching voltage, turn-on resistance, and turn-on time of substrate-triggered SCR (STSCR) device with dummy-gate structure have been efficiently improved, as compared with the normal SCR with shallow trench isolation (STI) structure.
Zhiwei Liu - One of the best experts on this subject based on the ideXlab platform.
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Ultra-low-voltage-triggered Silicon Controlled Rectifier (ULVTSCR) ESD Protection Device for 1.2V/1.8V Application
2020Co-Authors: Ruibo Chen, Hongxia Liu, Fei Hou, Zixu Liu, Xiaoyang Fan, Zhiwei LiuAbstract:Abstract High trigger voltage (Vt1) characteristic of Silicon-Controlled Rectifier (SCR) device has limited its application in electrostatic discharge (ESD) protection of low voltage circuit, especially in advanced CMOS technologies. In this letter, an ultra-low-voltage-triggered SCR (ULVTSCR) is proposed to decrease the trigger voltage of the conventional SCR. The proposed device consists of an external NMOSs-string (ENMOSs-string), an internal NMOS (INMOS) with its gate controlled by the ENMOSs-string, and a main SCR triggered with the INMOS assistance. The ESD current-voltage characteristics of ULVTSCR has been measured with the transmission line pulsing (TLP) tester. The test results indicate that the proposed ULVTSCR possesses much lower Vt1 of ~ 5.03V as well as reduced area consumption compared to the existing optimization methods, making it highly suitable for the ESD protection for 1.2V/1.8V IO ports in CMOS technology. In addition, the impact of various critical dimensions of ULVTSCR have also been evaluated to further improve the ESD characteristics.
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Augmented DTSCR With Fast Turn-On Speed for Nanoscale ESD Protection Applications
IEEE Transactions on Electron Devices, 2020Co-Authors: Wenqiang Song, Zhiwei Liu, Jizhi Liu, Juin J. Liou, Fei Hou, Xuanlin Xiong, Yang LiuAbstract:In this brief, two novel diode-triggered Silicon-Controlled Rectifiers (DTSCRs) with fast turn-on speed have been presented. By embedding current gain amplifier modules (i.e., Sziklai pair and Darlington pair) into the conventional DTSCR, the current gain of parasitic bipolar junction transistors (BJTs) on the Silicon-Controlled Rectifier (SCR) path in the new devices becomes much larger than that of the conventional counterpart, thus resulting in a faster turn-on speed and better quasi-static ${I}$ – ${V}$ characteristics. As such, the quasi-static triggering characteristic of the new DTSCR improves by 80%, and the turn-on speed improves by 42%–93% for different current levels.
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a compact and self isolated dual directional silicon controlled Rectifier scr for esd applications
IEEE Transactions on Device and Materials Reliability, 2019Co-Authors: Zhiwei Liu, Jizhi Liu, Jun Wang, Juin J. LiouAbstract:In this paper, a compact and self-isolated dual directional Silicon-Controlled Rectifier (CSDDSCR) developed in a single N-well has been proposed and demonstrated. Without using the P-well, the N-type isolation structure as well as an auxiliary trigger component, which are normally required in the traditional DDSCR, the novel CSDDSCR possesses a very high area-efficiency and robustness of ~8.81 V / $\mu$ m2. It is also shown that the CSDDSCR preserves a lower trigger voltage as 10 V, an adjustable holding voltage from 3.32 to 8.79 V under the TLP test, a smaller overshoot voltage of ~19 V at 2 A VFTLP stress, as well as an extremely low leakage current of ~94 pA measured at 3.3 V, making it a superior candidate for electrostatic discharge protection in the 3.3 V/5 V CMOS processes. Moreover, a holding voltage reversal effect has also been discovered and explained with TCAD simulation.
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New Diode-Triggered Silicon-Controlled Rectifier for Robust Electrostatic Discharge Protection at High Temperatures
IEEE Transactions on Electron Devices, 2019Co-Authors: Fei Hou, Zhiwei Liu, Jizhi Liu, Wen Huang, Tianxun Gong, Juin J. LiouAbstract:The diode-triggered Silicon-Controlled Rectifier (DTSCR) is an important device for the electrostatic discharge (ESD) protection of low-voltage integrated circuits, and its trigger voltage is determined by the forward turn-on voltage of diode string and the voltage drops on the parasitic resistors of metal interconnects. For the conventional DTSCR, the voltage drops on the parasitic resistors are often negligible so its triggering voltage is mainly determined by the forward turn-on voltage of diode string, which decreases with increasing temperature due to the inherited negative temperature coefficient. In this paper, an improved and novel device called thermal-stable DTSCR (TSDTSCR) is proposed to offer an improved ESD protection stability at elevated temperatures. This is done by changing and optimizing the 3-D layout. In particular, the experimental results show that the trigger voltage drop of the TSDTSCR can be reduced to 13.5% at 125 °C, comparing to 27.18% of the DTSCR. The holding voltage of the TSDTSCR is also more stable than that of the DTSCR over a wide range of temperatures.
Wei Liang - One of the best experts on this subject based on the ideXlab platform.
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Heterogeneous stacking silicon controlled Rectifier design with improved ESD performance
2017 IEEE 24th International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA), 2017Co-Authors: Aihua Dong, Juin J. Liou, Wei Liang, Javier A. Salcedo, Jean-jacques Hajjar, Kalpathy B. SundaramAbstract:A novel design consisting of a heterogeneous stacking of silicon control Rectifier is proposed in this paper. A latch-up free design in a high voltage BCDMOS process is demonstrated. Structures based on this method are compared with conventionally stacked SCR structure. Comprehensive characterization, including DC and transmission line pulsing (TLP), is undertaken to demonstrate the performance.
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very small snapback silicon controlled Rectifier for electrostatic discharge protection in 28 nm processing
Microelectronics Reliability, 2016Co-Authors: Weihuai Wang, Juin J. Liou, Shurong Dong, Hao Jin, Wei Guo, Wei Liang, Yan HanAbstract:Abstract A novel Silicon-Controlled Rectifier (SCR)-based device with very small snapback is proposed in this paper. New features including an embedded gate-to-VDD PMOS (GDPMOS) and lateral n-p-n BJT are used to achieve low trigger and high holding voltages suitable for electrostatic discharge (ESD) protection of 28-nm CMOS technology with very narrow ESD operation windows. Measured results show an ESD operation window of less than 1 V. TCAD simulation is also carried out to demonstrate the underlying physical mechanisms.
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No-Snapback Silicon-Controlled Rectifier for Electrostatic Discharge Protection of High-Voltage ICs
IEEE Electron Device Letters, 2015Co-Authors: Zhixin Wang, Wei Liang, Maxim Klebanov, Richard B. Cooper, Sebastian Courtney, Juin J. LiouAbstract:In this letter, we develop a no-snapback Silicon-Controlled Rectifier (NS-SCR) in a 0.35- $\mu {\mathrm{ m}}$ BCD technology. This device is constructed by embedding in a typical SCR a p-type/intrinsic/n-type diode as the trigger element and two highly doped extension regions as parts of the bases of the parasitic bipolar transistors. These added features allow for a high electric field to be maintained at the reverse biased n/p junction in the electrostatic discharge (ESD) current path, prevent the onset of strong conductivity modulation, and result in a no-snapback transmission line pulsing $I$ – $V$ characteristic. Stacking the NS-SCR’s offers an ESD protection solution that is area-efficient, robust, and latch-up immune. The high temperature effect on the leakage current of NS-SCR is also studied.
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Silicon-Controlled Rectifier for Electrostatic Discharge Protection Solutions With Minimal Snapback and Reduced Overshoot Voltage
IEEE Electron Device Letters, 2015Co-Authors: Ruei-cheng Sun, Juin J. Liou, Wei Liang, Zhixin Wang, Maxim Klebanov, Don-gey LiuAbstract:An electrostatic discharge (ESD) protection structure constructed by the stacking of multiple anode gate–cathode gate directly connected Silicon-Controlled Rectifiers (DCSCRs), fabricated in a 0.18- $\mu \text{m}$ CMOS technology is reported in this letter. Two embedded diodes in the DCSCR dictate the turn-ON mechanism and hence give rise to a trigger voltage equal to twice the diode’s turn-ON voltage. This approach enables the DCSCR to offer a diode-like transmission line pulsing IV characteristic with a minimal snapback and a SCR-like high-ESD robustness. At 25 °C, DCSCR has an acceptable nanoampere-level leakage current. Besides, it is verified that the DCSCR can significantly reduce overshoot voltage when stressed by very-fast-rising pulses. As such, an ESD clamp constructed by stacking a selected number of DCSCRs can offer a flexible trigger/holding voltage and is suitable for low and medium voltage ESD protection applications.
Zhixin Wang - One of the best experts on this subject based on the ideXlab platform.
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No-Snapback Silicon-Controlled Rectifier for Electrostatic Discharge Protection of High-Voltage ICs
IEEE Electron Device Letters, 2015Co-Authors: Zhixin Wang, Wei Liang, Maxim Klebanov, Richard B. Cooper, Sebastian Courtney, Juin J. LiouAbstract:In this letter, we develop a no-snapback Silicon-Controlled Rectifier (NS-SCR) in a 0.35- $\mu {\mathrm{ m}}$ BCD technology. This device is constructed by embedding in a typical SCR a p-type/intrinsic/n-type diode as the trigger element and two highly doped extension regions as parts of the bases of the parasitic bipolar transistors. These added features allow for a high electric field to be maintained at the reverse biased n/p junction in the electrostatic discharge (ESD) current path, prevent the onset of strong conductivity modulation, and result in a no-snapback transmission line pulsing $I$ – $V$ characteristic. Stacking the NS-SCR’s offers an ESD protection solution that is area-efficient, robust, and latch-up immune. The high temperature effect on the leakage current of NS-SCR is also studied.
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Silicon-Controlled Rectifier for Electrostatic Discharge Protection Solutions With Minimal Snapback and Reduced Overshoot Voltage
IEEE Electron Device Letters, 2015Co-Authors: Ruei-cheng Sun, Juin J. Liou, Wei Liang, Zhixin Wang, Maxim Klebanov, Don-gey LiuAbstract:An electrostatic discharge (ESD) protection structure constructed by the stacking of multiple anode gate–cathode gate directly connected Silicon-Controlled Rectifiers (DCSCRs), fabricated in a 0.18- $\mu \text{m}$ CMOS technology is reported in this letter. Two embedded diodes in the DCSCR dictate the turn-ON mechanism and hence give rise to a trigger voltage equal to twice the diode’s turn-ON voltage. This approach enables the DCSCR to offer a diode-like transmission line pulsing IV characteristic with a minimal snapback and a SCR-like high-ESD robustness. At 25 °C, DCSCR has an acceptable nanoampere-level leakage current. Besides, it is verified that the DCSCR can significantly reduce overshoot voltage when stressed by very-fast-rising pulses. As such, an ESD clamp constructed by stacking a selected number of DCSCRs can offer a flexible trigger/holding voltage and is suitable for low and medium voltage ESD protection applications.
