The Experts below are selected from a list of 27882 Experts worldwide ranked by ideXlab platform
David E Keyes - One of the best experts on this subject based on the ideXlab platform.
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hlibcov parallel hierarchical matrix approximation of large covariance matrices and likelihoods with applications in parameter identification
MethodsX, 2020Co-Authors: Alexander Litvinenko, Ronald Kriemann, Marc G Genton, David E KeyesAbstract:Abstract We provide more technical details about the HLIBCov package, which is using parallel hierarchical (H-) matrices to: • approximates large dense inhomogeneous covariance matrices with a log-linear computational cost and Storage Requirement; • computes matrix-vector product, Cholesky factorization and inverse with a log-linear complexity; • identify unknown parameters of the covariance function (variance, smoothness, and covariance length); These unknown parameters are estimated by maximizing the joint Gaussian log-likelihood function. To demonstrate the numerical performance, we identify three unknown parameters in an example with 2,000,000 locations on a PC-desktop.
Luis Marroyo - One of the best experts on this subject based on the ideXlab platform.
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Control strategies to use the minimum energy Storage Requirement for PV power ramp-rate control
Solar Energy, 2015Co-Authors: Ignacio Parra, Javier Marcos, M. Garcia, Luis MarroyoAbstract:Over the last few years, the considerable increase in the number of multi-MW PV plants has led transmission system operators (TSO) to express concern over potential PV power fluctuations caused by transient clouds. As a result, new grid codes are being issued in order to include new criteria that make it easier for the TSO to react appropriately to harmful short-term power fluctuations. Faced with this situation, some type of energy Storage system (ESS) is required in order to smooth out these fluctuations and comply with the regulations. Previous studies dealt with the ESS capacity required to comply with the maximum allowable ramp-rates stated in the grid code regulations, for any PV plant size for the worst fluctuation model. As the sign of the first fluctuation is unknown, a double capacity battery is required to absorb both the upward and downward fluctuations. In this paper we propose two innovative management strategies which make it possible to half the size of the ESS state of the art. The general validity of both strategies has been confirmed through simulations carried out with real operational PV power output data taken every 5 s in the course of one year at the 38.5. MW PV power plant of Moura (Portugal).
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minimizing energy Storage Requirement for pv power ramp rate limitation controlling the inverters mppt
29th European Photovoltaic Solar Energy Conference and Exhibition, 2014Co-Authors: I De La Parra, Javier Marcos, Miguel Torres Garcia, Luis MarroyoAbstract:Short-term variability in the power generated by large grid-connected PV plants can negatively affect power quality and the network reliability. New grid-codes require combining the PV generator with some form of energy Storage technology in order to reduce short-term PV power fluctuation. Herein, an effective control is proposed to comply with the maximum allowable ramp-rate limitation with the minimum energy Storage capacity. This works presents a new state of charge (SOC) control involving some changes in the the maximum power point tracking (MPPT) algorithm of the inverters. The solution is corroborated with 1-year 5 second power measurements which were recorded at the output of 550 kW inverters at the 38.5 MW Amareleja (Portugal) PV plant.
Alexander Litvinenko - One of the best experts on this subject based on the ideXlab platform.
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hlibcov parallel hierarchical matrix approximation of large covariance matrices and likelihoods with applications in parameter identification
MethodsX, 2020Co-Authors: Alexander Litvinenko, Ronald Kriemann, Marc G Genton, David E KeyesAbstract:Abstract We provide more technical details about the HLIBCov package, which is using parallel hierarchical (H-) matrices to: • approximates large dense inhomogeneous covariance matrices with a log-linear computational cost and Storage Requirement; • computes matrix-vector product, Cholesky factorization and inverse with a log-linear complexity; • identify unknown parameters of the covariance function (variance, smoothness, and covariance length); These unknown parameters are estimated by maximizing the joint Gaussian log-likelihood function. To demonstrate the numerical performance, we identify three unknown parameters in an example with 2,000,000 locations on a PC-desktop.
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hlibcov parallel hierarchical matrix approximation of large covariance matrices and likelihoods with applications in parameter identification
arXiv: Computation, 2017Co-Authors: Alexander LitvinenkoAbstract:We provide more technical details about the HLIBCov package, which is using parallel hierarchical ($\H$-) matrices to identify unknown parameters of the covariance function (variance, smoothness, and covariance length). These parameters are estimated by maximizing the joint Gaussian log-likelihood function. The HLIBCov package approximates large dense inhomogeneous covariance matrices with a log-linear computational cost and Storage Requirement. We explain how to compute the Cholesky factorization, determinant, inverse and quadratic form in the H-matrix format. To demonstrate the numerical performance, we identify three unknown parameters in an example with 2,000,000 locations on a PC-desktop.
Biao Zhao - One of the best experts on this subject based on the ideXlab platform.
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energy Storage Requirement reduction using negative voltage states of a full bridge modular multilevel converter
IEEE Transactions on Power Electronics, 2019Co-Authors: Qiang Song, Wenbo Yang, Biao Zhao, Hong Rao, Zhe ZhuAbstract:Utilization of negative-voltage states substantially reduces the energy Storage Requirements of a full-bridge submodule-based modular multilevel converter (FB-MMC). This study provides a detailed analysis of the capacitor voltage ripple and energy Storage Requirement reduction effects of the FB-MMC by utilizing negative-voltage states. The analytical expressions of capacitor voltage ripple following the change in negative-voltage state factor (NVSF) are derived. Results show that the capacitor voltage ripple reduction effects using negative-voltage states are strongly correlated with the operated power factor angle. In addition, the second-order ripple component must be considered to increase the accuracy in evaluating the voltage ripple reduction effects. This study defines the energy Storage reduction factor (ESRF) to indicate the level at which the energy Storage Requirement can be minimized by selecting an appropriate NVSF for a given permitted operating range of the power factor angle. The curve of the ESRF following the change in the permitted operating range of the power factor angle was calculated. The analytical method and the evaluation results for the capacitor voltage and energy Storage reduction effects of the FB-MMC using negative-voltage states are verified on the basis of the simulation and experimental results.
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energy Storage Requirement and low capacitance operation of unidirectional current h bridge modular multilevel converters
IEEE Transactions on Power Electronics, 2019Co-Authors: Wenbo Yang, Qiang Song, Biao ZhaoAbstract:Unidirectional current H-bridge modular multilevel converter (UCH-MMC) is a variant of full-bridge MMC and uses fewer semiconductor devices. The operating area and operation mode of UCH-MMC differ from those of conventional half-bridge MMC (HB-MMC) because of the unidirectional current and bipolar voltage of UCH-MMC arms. Thus, analyzing the energy Storage Requirement (ESR) of UCH-MMC differs from that of HB-MMC. This paper proposes a model for calculating the ESR of UCH-MMC. The ESR of the UCH-MMC under the entire operating area is analyzed. A modified operating scheme that dynamically trims the sub-module capacitor voltage to allow the low capacitance operation under the entire operating area is proposed. Results verify that the UCH-MMC has much lower ESR than HB-MMC. Evaluation results also show that the cost and volume of the UCH-MMC are much lower than those of HB-MMC because of the low ESR. The low ESR of UCH-MMC was verified by simulations and experiments.
Sattam Al Otaibi - One of the best experts on this subject based on the ideXlab platform.
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irregular mapped protograph ldpc coded modulation a bandwidth efficient solution for 5g networks with massive data Storage Requirement
arXiv: Information Theory, 2021Co-Authors: Yi Fang, Pingping Chen, Shahid Mumtaz, Francis C M Lau, Sattam Al OtaibiAbstract:The huge amount of data produced in the fifth-generation (5G) networks not only brings new challenges to the reliability and efficiency of mobile devices but also drives rapid development of new Storage techniques. With the benefits of fast access speed and high reliability, NAND flash memory has become a promising Storage solution for the 5G networks. In this paper, we investigate a protograph-coded bit-interleaved coded modulation with iterative detection and decoding (BICM-ID) utilizing irregular mapping (IM) in the multi-level-cell (MLC) NAND flash-memory systems. First, we propose an enhanced protograph-based extrinsic information transfer (EPEXIT) algorithm to facilitate the analysis of protograph codes in the IM-BICM-ID systems. With the use of EPEXIT algorithm, a simple design method is conceived for the construction of a family of high-rate protograph codes, called irregular-mapped accumulate-repeat-accumulate (IMARA) codes, which possess both excellent decoding thresholds and linear-minimum-distance-growth property. Furthermore, motivated by the voltage-region iterative gain characteristics of IM-BICM-ID systems, a novel read-voltage optimization scheme is developed to acquire accurate read-voltage levels, thus minimizing the decoding thresholds of protograph codes. Theoretical analyses and error-rate simulations indicate that the proposed IMARA-aided IM-BICM-ID scheme and the proposed read-voltage optimization scheme remarkably improve the convergence and decoding performance of flash-memory systems. Thus, the proposed protograph-coded IM-BICM-ID flash-memory systems can be viewed as a reliable and efficient Storage solution for the new-generation mobile networks with massive data-Storage Requirement.
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Irregular-Mapped Protograph LDPC-Coded Modulation: A Bandwidth-Efficient Solution for $5$G Networks with Massive Data-Storage Requirement
2021Co-Authors: Yi Fang, Bu Yingcheng, Chen Pingping, Mumtaz Shahid, Lau, Francis C. M., Sattam Al OtaibiAbstract:The huge amount of data produced in the fifth-generation (5G) networks not only brings new challenges to the reliability and efficiency of mobile devices but also drives rapid development of new Storage techniques. With the benefits of fast access speed and high reliability, NAND flash memory has become a promising Storage solution for the 5G networks. In this paper, we investigate a protograph-coded bit-interleaved coded modulation with iterative detection and decoding (BICM-ID) utilizing irregular mapping (IM) in the multi-level-cell (MLC) NAND flash-memory systems. First, we propose an enhanced protograph-based extrinsic information transfer (EPEXIT) algorithm to facilitate the analysis of protograph codes in the IM-BICM-ID systems. With the use of EPEXIT algorithm, a simple design method is conceived for the construction of a family of high-rate protograph codes, called irregular-mapped accumulate-repeat-accumulate (IMARA) codes, which possess both excellent decoding thresholds and linear-minimum-distance-growth property. Furthermore, motivated by the voltage-region iterative gain characteristics of IM-BICM-ID systems, a novel read-voltage optimization scheme is developed to acquire accurate read-voltage levels, thus minimizing the decoding thresholds of protograph codes. Theoretical analyses and error-rate simulations indicate that the proposed IMARA-aided IM-BICM-ID scheme and the proposed read-voltage optimization scheme remarkably improve the convergence and decoding performance of flash-memory systems. Thus, the proposed protograph-coded IM-BICM-ID flash-memory systems can be viewed as a reliable and efficient Storage solution for the new-generation mobile networks with massive data-Storage Requirement.Comment: 13pages, 11figure
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Irregular-Mapped Protograph LDPC-Coded Modulation: A Bandwidth-Efficient Solution for $5$G Networks with Massive Data-Storage Requirement
2021Co-Authors: Yi Fang, Bu Yingcheng, Chen Pingping, Mumtaz Shahid, Lau, Francis C. M., Sattam Al OtaibiAbstract:The huge amount of data produced in the fifth-generation (5G) networks not only brings new challenges to the reliability and efficiency of mobile devices but also drives rapid development of new Storage techniques. With the benefits of fast access speed and high reliability, NAND flash memory has become a promising Storage solution for the 5G networks. In this paper, we investigate a protograph-coded bit-interleaved coded modulation with iterative detection and decoding (BICM-ID) utilizing irregular mapping (IM) in the multi-level-cell (MLC) NAND flash-memory systems. First, we propose an enhanced protograph-based extrinsic information transfer (EPEXIT) algorithm to facilitate the analysis of protograph codes in the IM-BICM-ID systems. With the use of EPEXIT algorithm, a simple design method is conceived for the construction of a family of high-rate protograph codes, called irregular-mapped accumulate-repeat-accumulate (IMARA) codes, which possess both excellent decoding thresholds and linear-minimum-distance-growth property. Furthermore, motivated by the voltage-region iterative gain characteristics of IM-BICM-ID systems, a novel read-voltage optimization scheme is developed to acquire accurate read-voltage levels, thus minimizing the decoding thresholds of protograph codes. Theoretical analyses and error-rate simulations indicate that the proposed IMARA-aided IM-BICM-ID scheme and the proposed read-voltage optimization scheme remarkably improve the convergence and decoding performance of flash-memory systems. Thus, the proposed protograph-coded IM-BICM-ID flash-memory systems can be viewed as a reliable and efficient Storage solution for the new-generation mobile networks with massive data-Storage Requirement.Comment: More research effort should be made to improve the quality of this paper with the help of other collegues. The paper must be withdrawed at this stage as some content should be revised and change
