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Analog Integrated Circuits
The Experts below are selected from a list of 12939 Experts worldwide ranked by ideXlab platform
Willy Sansen – 1st expert on this subject based on the ideXlab platform
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simulation based generation of posynomial performance models for the sizing of Analog Integrated Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2003Co-Authors: Walter Daems, Georges Gielen, Willy SansenAbstract:This paper presents an overview of methods to automatically generate posynomial response surface models for the performance characteristics of Analog Integrated Circuits based on numerical simulation data. The methods are capable of generating posynomial performance expressions for both linear and nonlinear Circuits and circuit characteristics, at SPICE-level accuracy. This approach allows for automatic generation of an accurate sizing model for a circuit that composes a geometric program that fully describes the Analog circuit sizing problem. The automatic generation avoids the time-consuming and approximate nature of handcrafted analytic model generation. The methods are based on techniques from design of experiments and response surface modeling. Attention is paid to estimating the relative “goodness-of-fit” of the generated models. Experimental results illustrate the capabilities and effectiveness of the presented methods.
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an efficient optimization based technique to generate posynomial performance models for Analog Integrated Circuits
Design Automation Conference, 2002Co-Authors: Walter Daems, Georges Gielen, Willy SansenAbstract:This paper presents an new direct–fitting method to generate posynomial response surface models with arbitrary constant exponents for linear and nonlinear performance parameters of Analog Integrated Circuits. Posynomial models enable the use of efficient geometric programming techniques for circuit sizing and optimization. The automatic generation avoids the time–consuming nature and inaccuracies of handcrafted analytic model generation. The technique is based on the fitting of posynomial model templates to numerical data from SPICE simulations. Attention is paid to estimating the relative `goodness–of–fit’ of the generated models. Experimental results illustrate the significantly better accuracy of the new approach.
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amgie a synthesis environment for cmos Analog Integrated Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2001Co-Authors: G. Van Der Plas, Willy Sansen, Georges Gielen, K Lampaert, G Debyser, F Leyn, J Vandenbussche, P Veselinovic, D LeenartsAbstract:A synthesis environment for Analog Integrated Circuits is presented that is able to drastically increase design and layout productivity for Analog blocks. The system covers the complete design flow from specification over topology selection and optimal circuit sizing down to automatic layout generation and performance characterization. It follows a hierarchical refinement strategy for more complex cells and is process independent. The sizing is based on an improved equation-based optimization approach, where the circuit behavior is characterized by declarative models that are then converted in a sequential design plan. Supporting tools have been developed to reduce the total effort to set up a new circuit topology in the system’s database. The performance-driven layout generation tool guarantees layouts that satisfy all performance constraints. Redesign support is included in the design flow management to perform backtracking in case of design problems. The experimental results illustrate the productiveness and efficiency of the environment for the synthesis and process tuning of frequently used Analog cells.
Georges Gielen – 2nd expert on this subject based on the ideXlab platform
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Symbolic Distortion Analysis of Analog Integrated Circuits
, 2020Co-Authors: Wim Verhaegen, Georges GielenAbstract:A technique for generating symbolic expressions for the distortion in weakly nonlinear Analog Integrated Circuits is presented. This technique uses some acceptable assumptions to reduce the task of analyzing the nonlinear circuit to a repeated analysis of derived linear Circuits. This repetitive algorithm has been implemented and it is demonstrated on an example circuit. In the analysis of Analog Integrated Circuits, distortion and intermodulation are important factors. Either they are unwanted, as is the case in linear building blocks like opamps, or they are explicitly wanted to obtain a signal shifted in frequency, as is the case with mixers. Distortion and intermodulation need to be assessed ac- curately in both cases. Classical numerical simulation techniques using it- erative algorithms for solving the differential equations are slow and inaccurate due to the large difference be- tween the time constants normally present in the Circuits of interest. Several numerical methods have been devel- oped to overcome this problem, e.g. the harmonic bal- ance technique (1), multitime analysis (2) and the use of describing functions in Circuits with feedback (3). How- ever, the numerical nature of these techniques implies that no symbolic results can be derived, so that re-use of results — in the form of design equations — is not possible. An analysis technique that does yield symbolic re- sults is described in this paper. Based on a set of as- sumptions, the analysis of a weakly nonlinear circuit is reduced to a number of analyses of linear Circuits. A lin- ear symbolic analysis core is used for these individual analysis steps, and its results are combined and manip- ulated to get a closed-form symbolic end result. This result can be used as a design equation, or the impact of the circuit nonlinearities on distortion and intermodula- tion can be derived from it. Before explaining this technique, it is to be noted that similar approaches have been followed in the past to obtain symbolic expressions for the distortion in spe- cific classes of Circuits. E.g. the distortion in sampling mixers is analyzed in (4), and a method for analyzing the distortion in Analog building blocks is presented in (5). All symbolic approaches are intrinsically limited someway, and these publications are no exceptions. The scope of the algorithm presented in this paper is limited to weakly nonlinear Circuits. This means that the circuit
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Techniques and Applications of Symbolic Analysis for Analog Integrated Circuits: A Tutorial Overview
Computer-Aided Design of Analog Integrated Circuits and Systems, 2020Co-Authors: Rob A. Rutenbar, Georges Gielen, Brian A. AntaoAbstract:This tutorial paper gives an overview of the state of the art in symbolic analysis techniques for Analog Integrated Circuits. Symbolic analysis allows to generate closed-form analytic expre-ssions for a circuit’s small-signal characteristics with the circuit’s elements and the frequency variable represented by symbols. Such analytic information complements the results from numerical simulations. The paper then describes the different application areas of symbolic analysis in the design of Analog Integrated Circuits. Symbolic analysis is mainly used as a means to obtain insight into a circuit’s behavior, to generate analytic models for automated circuit sizing, for behavioral model generation and in applications requiring the repetitive evaluation of circuit characteristics. Recent extensions of both the functionality (such as towards symbolic distortion or pole-zero analysis) and the efficiency of symbolic analysis for larger Circuits (through new algorithmic developments) are discussed. Finally, an overview and comparison of existing tools is presented.
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globally reliable variation aware sizing of Analog Integrated Circuits via response surfaces and structural homotopy
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2009Co-Authors: Trent Mcconaghy, Georges GielenAbstract:This paper presents SANGRIA, a tool for automated globally reliable variation-aware sizing of Analog Integrated Circuits. Its keys to efficient search are adaptive response surface modeling, and a new concept, structural homotopy. Structural homotopy embeds homotopy-style objective function tightening into the search state’s structure, not dynamics. Searches at several different levels are conducted simultaneously: The loosest level does nominal dc simulation, and tighter levels add more analyses and {process, environmental} corners. New randomly generated designs are continually fed into the lowest (cheapest) level, always trying new regions to avoid premature convergence. For further efficiency, SANGRIA adaptively constructs response surface models, from which new candidate designs are optimally chosen according to both yield optimality on model and model prediction uncertainty. The stochastic gradient boosting models support arbitrary nonlinearities, and have linear scaling with input dimension and sample size. SANGRIA uses SPICE in the loop, supports accurate/complex statistical SPICE models, and does not make assumptions about the convexity or differentiability of the objective function. SANGRIA is demonstrated on four different Analog Circuits having from 10 to 50 devices and up to 444 design/process/environmental variables.
W. Sansen – 3rd expert on this subject based on the ideXlab platform
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Evaluation of error-control strategies for the linear symbolic analysis of Analog Integrated Circuits
IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 1999Co-Authors: W. Daems, W. Verhaegen, P. Wambacq, G. Gielen, W. SansenAbstract:The generation of approximate linear symbolic expressions for Analog Integrated Circuits requires the use of an appropriate error-control strategy. The error-control strategy determines both correctness and compactness of the approximate expression. This paper presents an evaluation of different error-control strategies that fit within the flat symbolic analysis, using simplification during generation techniques for large Analog Integrated Circuits. The theoretical exposition is illustrated with experimental results that allow a comparison of the proposed methods.
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Toward sub 1 V Analog Integrated Circuits in submicron standard CMOS technologies
1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers ISSCC. First Edition (Cat. No.98CH36156), 1998Co-Authors: W. Sansen, M. Steyaert, V. Peluso, E. PeetersAbstract:Lower channel lengths lead to lower supply voltages. For 0.25 /spl mu/m MOSTs the supply voltage is 2.5 V. Even lower supply voltages will follow. This paper deals with Analog Integrated Circuits that can handle the reduction of the supply voltage down to 1 V. Existing solutions for such low supply voltages are: 1) reduction of threshold voltages from 0.7 V to 0.3-0.4 V; 2) use of voltage multipliers. It is possible to reduce supply voltages to 1 V in standard CMOS without voltage multipliers. The advent of deep submicron CMOS dictates reduced supply voltage.
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Efficient symbolic computation of approximated small-signal characteristics of Analog Integrated Circuits
IEEE Journal of Solid-State Circuits, 1995Co-Authors: P. Wambacq, F.v. Fernandez, W. Sansen, G. Gielen, A. Rodriguez-vazquezAbstract:A symbolic analysis tool is presented that generates simplified symbolic expressions for the small-signal characteristics of large Analog Integrated Circuits. The expressions are approximated while they are computed, so that only those terms are generated which remain in the final expression. This principle causes drastic savings in CPU time and memory, compared with previous symbolic analysis tools. In this way, the maximum size of Circuits that can be analyzed, is largely increased. By taking into account a range for the value of a circuit parameter rather than one single number, the generated expressions are also more generally valid. Mismatch handling is explicitly taken into account in the algorithm. The capabilities of the new tool are illustrated with several experimental results.