The Experts below are selected from a list of 321 Experts worldwide ranked by ideXlab platform

Man Wong - One of the best experts on this subject based on the ideXlab platform.

  • an Effective Channel mobility based analytical on current model for polycrystalline silicon thin film transistors
    IEEE Transactions on Electron Devices, 2007
    Co-Authors: Mingxiang Wang, Man Wong
    Abstract:

    A physical-based analytical ON-state drain-current model was developed based on a mobility model including both grain boundary barrier-controlled carrier conduction and gate voltage dependent mobility degradation. Mobility variation along the conduction Channel caused by both effects was taken into account. The derived drain-current can be approximated by a previously followed form, however, with mobility term modified and saturation factor included. Our experimental Effective Channel mobility and above-threshold drain-current data from both low-temperature and high-temperature processed polycrystalline silicon thin-film transistors can be accurately fitted by the model, without introducing any empirical or artificial factors

  • Effective Channel Mobility of Poly-Silicon Thin Film Transistors
    2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings, 2006
    Co-Authors: Mingxiang Wang, Man Wong, Xuejie Shi, Dongli Zhang
    Abstract:

    Effective Channel mobilities of polycrystalline silicon (poly-Si) thin film transistors (TFTs) have been experimentally extracted by drain conductance and Channel charge measured at linear region. It is demonstrated that conventionally followed device field effect mobility is largely deviated from Effective Channel mobility. Based on a mobility model including both barrier controlled carrier conduction and Effective transverse field controlled mobility degradation, our experimental Channel mobility data can be reproduced for both low temperature and high temperature recrystallized poly-Si TFTs, without introducing any empirical or artificial factors

Sridhar Subbanna - One of the best experts on this subject based on the ideXlab platform.

  • a novel Channel resistance ratio method for Effective Channel length and series resistance extraction in mosfets
    Solid-state Electronics, 2000
    Co-Authors: S J Mathew, John D. Cressler, Sridhar Subbanna
    Abstract:

    Abstract A resistance ratio method for electrical Effective Channel length and series resistance extraction is developed and verified on an advanced 0.35 μm LDD CMOS technology. This method avoids the gate bias range optimization required in the widely used “shift-and-ratio” (S&R) method, which is usually technology specific, while retaining the single transistor algorithm nature of S&R.

  • A Channel resistance derivative method for Effective Channel length extraction in LDD MOSFETs
    IEEE Transactions on Electron Devices, 2000
    Co-Authors: Guofu Niu, S J Mathew, John D. Cressler, Sridhar Subbanna
    Abstract:

    A Channel resistance derivative method for extracting the electrical Effective Channel length and series resistance is proposed, and demonstrated on an advanced 0.35 /spl mu/m LDD CMOS technology. A clear graphic image of the L/sub EFF/ and R/sub SD/ is obtained directly from the measured Channel resistance and its derivative with respect to the gate bias. The method also provides guidelines for the proper gate bias range selection in traditional L/sub EFF/ extraction techniques.

  • A total resistance slope-based Effective Channel mobility extraction method for deep submicrometer CMOS technology
    IEEE Transactions on Electron Devices, 1999
    Co-Authors: Guofu Niu, S J Mathew, John D. Cressler, Sridhar Subbanna
    Abstract:

    A simple yet Effective total resistance slope-based method for extracting the Effective Channel mobility in deep submicrometer CMOS technology is developed. Using the slope of the measured total resistance versus mask length, the series resistance is removed from the measured total resistance, and mobility is extracted without involving the Effective Channel length. The new method facilitates mobility extraction in situations where the Effective Channel length is difficult to extract, such as in lightly-doped-drain (LDD) devices or at low temperatures. The new method also allows the series resistance to be any function of the gate bias, making the mobility extraction in LDD devices easier and more accurate.

Mingxiang Wang - One of the best experts on this subject based on the ideXlab platform.

  • an Effective Channel mobility based analytical on current model for polycrystalline silicon thin film transistors
    IEEE Transactions on Electron Devices, 2007
    Co-Authors: Mingxiang Wang, Man Wong
    Abstract:

    A physical-based analytical ON-state drain-current model was developed based on a mobility model including both grain boundary barrier-controlled carrier conduction and gate voltage dependent mobility degradation. Mobility variation along the conduction Channel caused by both effects was taken into account. The derived drain-current can be approximated by a previously followed form, however, with mobility term modified and saturation factor included. Our experimental Effective Channel mobility and above-threshold drain-current data from both low-temperature and high-temperature processed polycrystalline silicon thin-film transistors can be accurately fitted by the model, without introducing any empirical or artificial factors

  • Effective Channel Mobility of Poly-Silicon Thin Film Transistors
    2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings, 2006
    Co-Authors: Mingxiang Wang, Man Wong, Xuejie Shi, Dongli Zhang
    Abstract:

    Effective Channel mobilities of polycrystalline silicon (poly-Si) thin film transistors (TFTs) have been experimentally extracted by drain conductance and Channel charge measured at linear region. It is demonstrated that conventionally followed device field effect mobility is largely deviated from Effective Channel mobility. Based on a mobility model including both barrier controlled carrier conduction and Effective transverse field controlled mobility degradation, our experimental Channel mobility data can be reproduced for both low temperature and high temperature recrystallized poly-Si TFTs, without introducing any empirical or artificial factors

Guofu Niu - One of the best experts on this subject based on the ideXlab platform.

  • A Channel resistance derivative method for Effective Channel length extraction in LDD MOSFETs
    IEEE Transactions on Electron Devices, 2000
    Co-Authors: Guofu Niu, S J Mathew, John D. Cressler, Sridhar Subbanna
    Abstract:

    A Channel resistance derivative method for extracting the electrical Effective Channel length and series resistance is proposed, and demonstrated on an advanced 0.35 /spl mu/m LDD CMOS technology. A clear graphic image of the L/sub EFF/ and R/sub SD/ is obtained directly from the measured Channel resistance and its derivative with respect to the gate bias. The method also provides guidelines for the proper gate bias range selection in traditional L/sub EFF/ extraction techniques.

  • A total resistance slope-based Effective Channel mobility extraction method for deep submicrometer CMOS technology
    IEEE Transactions on Electron Devices, 1999
    Co-Authors: Guofu Niu, S J Mathew, John D. Cressler, Sridhar Subbanna
    Abstract:

    A simple yet Effective total resistance slope-based method for extracting the Effective Channel mobility in deep submicrometer CMOS technology is developed. Using the slope of the measured total resistance versus mask length, the series resistance is removed from the measured total resistance, and mobility is extracted without involving the Effective Channel length. The new method facilitates mobility extraction in situations where the Effective Channel length is difficult to extract, such as in lightly-doped-drain (LDD) devices or at low temperatures. The new method also allows the series resistance to be any function of the gate bias, making the mobility extraction in LDD devices easier and more accurate.

  • Back Junction SiGe PMOS - A New Structure with an Improved Effective Channel Mobility
    1994
    Co-Authors: Guofu Niu, Gang Ruan, T.a. Tang, Richard Y. Kwor
    Abstract:

    We propose here a back junction SiGe PMOS structure having a cross section of Poly/SiO 2 /Si-cap/SiGe/n-epi/p-substrate. The electrical coupling between the front gate and the back p-substrate/n-epi junction reduces the vertical field, thus improving the hole confinement and the SiGe Channel mobility, resulting in an improved Effective Channel mobility. Numerical simulation shows that the back junction SiGe PMOS has a higher Effective Channel mobility compared to the fully-depleted SOI and conventional bulk SiGe PMOS.

Paul A. Layman - One of the best experts on this subject based on the ideXlab platform.

  • MOSFET Effective Channel width determination by nonlinear optimization
    Solid-State Electronics, 1993
    Co-Authors: Colin C. Mcandrew, Paul A. Layman, Robert A. Ashton
    Abstract:

    Abstract Accurate determination of MOSFET Effective Channel width Weff is important for process control and device design. Existing methods to determine Weff are sensitive to measurement noise, and to nonlinearities in the data. In this paper we present a new method to determine Weff that overcomes these problems. The method uses nonlinear optimization, and is based on a drain current model that accounts for the variations of Weff, of series resistance, and of threshold voltage, with masked Channel width and gate bias. We also show that our new method is more accurate and less sensitive to measurement procedure than other methods.

  • mosfet Effective Channel length threshold voltage and series resistance determination by robust optimization
    IEEE Transactions on Electron Devices, 1992
    Co-Authors: Colin C. Mcandrew, Paul A. Layman
    Abstract:

    MOSFET parameters, such as Effective Channel length, series resistance, and Channel mobility, are important for process control and device design. These parameters are typically obtained from intercepts and slopes of plots of intermediate quantities, such as peak transconductance, derived from I-V data. Commonly, the intercept of a plot is found by extrapolation. However, the extrapolation process is sensitive to measurement errors. In addition, the plots often show nonlinear behavior, hence slopes and intercepts cannot be determined accurately. It is shown how these problems can be overcome by using a nonlinear optimization procedure to determine those MOSFET parameters, by explicitly identifying them as the parameters of a simple, widely used MOSFET model that is a good approximation in the triode region of operation. The results of five tests of robustness and accuracy that show that the method is significantly more accurate and robust than a number of other methods are presented. >