The Experts below are selected from a list of 90882 Experts worldwide ranked by ideXlab platform

Mohammed Ismail - One of the best experts on this subject based on the ideXlab platform.

  • Universal constant-g/sub m/ Input-Stage architectures for low-voltage op amps
    IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, 1995
    Co-Authors: Changku Hwang, A. Motamed, Mohammed Ismail
    Abstract:

    In this paper, a novel design technique for low-voltage, constant transconductance (g/sub m/) op amp Input Stages is presented. The new technique which uses current-mode circuits is based on processing signal currents, rather than handling DC tail currents, to achieve a constant-g/sub m/. Two cases are developed. One is based on processing signal currents (the AC case) while the other is based on processing total instantaneous currents (the TIC case). The adopted design strategy in both cases is universal in that it is independent of the Input Stage transistor types (FET or bipolar) and their operating regions. It also considerably simplifies the design procedure of low-voltage op amps. To demonstrate the new concepts, universal op amp Input Stage architectures have been developed and their performances have been verified in both MOS and bipolar design examples. The MOS designs have been verified in both weak and strong inversion. The proposed universal implementations achieve almost constant-g/sub m/, independent of the common mode Input voltage range from rail-to-rail.

  • A new implementation of constant-g/sub m/ op amp Input Stage for CMOS low voltage applications
    38th Midwest Symposium on Circuits and Systems. Proceedings, 1995
    Co-Authors: Changku Hwang, A. Motamed, Mohammed Ismail
    Abstract:

    In this paper we propose a new implementation method for the design of op amp Input Stage with rail-to-rail constant-g/sub m/. The new implementation is based on processing signal currents rather than handling DC tail currents. As a result, it is universal in that the constant-g/sub m/ can be obtained independent of Input transistor types (MOS or bipolar) and their operating regions (weak or strong inversion for MOS and active for bipolar). To demonstrate the idea, a new MOS-type Input Stage has been designed with a 2-/spl mu/m CMOS process and simulation results of Input Stage transconductance are provided. The common mode Input voltage can even exceed the positive and the negative rails by 300 mV.

  • A programmable low-voltage micropower CMOS Input Stage architecture
    1996 Symposium on VLSI Circuits. Digest of Technical Papers, 1
    Co-Authors: A. Motamed, Changku Hwang, Mohammed Ismail
    Abstract:

    A very simple CMOS rail-to-rail, constant-g/sub m/ opamp Input Stage architecture is presented. The constant-g/sub m/ is achieved by processing signal currents rather than DC bias currents. As a result, the architecture is universal in that it operates in both weak and strong inversion regions with small variations in g/sub m/.

J M Carrillo - One of the best experts on this subject based on the ideXlab platform.

  • single pair bulk driven cmos Input Stage a compact low voltage analog cell for scaled technologies
    Integration, 2010
    Co-Authors: J M Carrillo, Guido Torelli, R Perezaloe, J M Valverde, Francisco J Duquecarrillo
    Abstract:

    Bulk-driven MOS transistors lead to a compact low-voltage/low-power Input Stage implementation. This paper illustrates the rail-to-rail capability of a single-pair bulk-driven CMOS Input Stage operated from an extremely low supply voltage. A composite Input Stage is also introduced to point out some limitations inherent in multiple-pair Input Stages and carry out performance comparison, based on experimental data obtained in standard [email protected] CMOS technology. The performance achieved by the single-pair bulk-driven Input Stage can be readily extended to a nanoscale process, as lower supply voltages in scaled technologies are expected. Measurements demonstrate the rail-to-rail suitability of the single-pair Input Stage and show intrinsic advantages of this approach in some amplifier features, such as linearity and common-mode rejection ratio, as compared to the case of the composite solution.

  • 1 v rail to rail cmos opamp with improved bulk driven Input Stage
    IEEE Journal of Solid-state Circuits, 2007
    Co-Authors: J M Carrillo, Guido Torelli, R Perezaloe, J F Duquecarrillo
    Abstract:

    This paper introduces a CMOS operational amplifier with rail-to-rail Input and output voltage ranges, suitable for operation in extremely low-voltage environments. The approach is based on a bulk-driven Input Stage with extended Input common-mode voltage range, in which the effective Input transconductance is enhanced by means of a partial positive feedback loop. As a result, a gain and gain-bandwidth product performance similar to that of an amplifier using a gate-driven approach is obtained. Output rail-to-rail operation is achieved by means of a push-pull Stage, which is biased in class-AB by using a static feedback loop, thus avoiding frequency limitations inherent in dynamic-feedback tuning schemes. The proposed two-Stage operational amplifier was designed to operate with a 1-V supply, and a test chip prototype was fabricated in 0.35-mum standard CMOS technology. The experimental performance features an open-loop DC gain higher than 76 dB and a closed-loop unity-gain bandwidth above 8 MHz when a 1-MOmegapar17-pF load is connected to the amplifier output.

  • constant g sub m constant slew rate high bandwidth low voltage rail to rail cmos Input Stage for vlsi cell libraries
    IEEE Journal of Solid-state Circuits, 2003
    Co-Authors: J M Carrillo, J F Duquecarrillo, G Torelli, J L Ausin
    Abstract:

    This paper introduces a general-purpose low-voltage rail-to-rail Input Stage suitable for analog and mixed-signal applications. The proposed circuit provides, simultaneously, constant small-signal and large-signal behaviors over the entire Input common-mode voltage range, while imposing no appreciable constraint for high-frequency operation. In addition, the accuracy of the circuit does not rely on any strict matching of the devices, unlike most of the traditional approaches based on complementary Input pairs, which need to compensate for the difference in mobility between electrons and holes with the transistor aspect ratios. Also, the technique is compatible with deep submicrometer CMOS devices, where the familiar voltage-to-current square law in saturation is not completely satisfied. Based on the proposed Input Stage, a transconductor with rail-to-rail Input common-mode range and an Input/output rail-to-rail operational amplifier were developed. Both cells were designed to operate with a 3-V single supply and fabricated in standard 0.8-/spl mu/m CMOS technology. Experimental results are provided.

  • constant g sub m constant slew rate high bandwidth low voltage rail to rail cmos Input Stage for vlsi cell libraries
    International Symposium on Circuits and Systems, 2003
    Co-Authors: J M Carrillo, J F Duquecarrillo, G Torelli, J L Ausin
    Abstract:

    This paper introduces a general-purpose low-voltage rail-to-rail Input Stage suitable for analog and mixed-signal applications. The proposed scheme provides, simultaneously, constant small-signal and large-signal behaviors over the entire Input common-mode voltage range, whilst imposing no appreciable constraint for high-frequency operation. In addition, the technique does not rely on any strict matching condition between complementary differential pairs, and is compatible with deep submicron CMOS devices, where the familiar voltage-to-current square-law in saturation is not completely satisfied. Experimental results on integrated prototypes are provided.

J F Duquecarrillo - One of the best experts on this subject based on the ideXlab platform.

  • 1 v rail to rail cmos opamp with improved bulk driven Input Stage
    IEEE Journal of Solid-state Circuits, 2007
    Co-Authors: J M Carrillo, Guido Torelli, R Perezaloe, J F Duquecarrillo
    Abstract:

    This paper introduces a CMOS operational amplifier with rail-to-rail Input and output voltage ranges, suitable for operation in extremely low-voltage environments. The approach is based on a bulk-driven Input Stage with extended Input common-mode voltage range, in which the effective Input transconductance is enhanced by means of a partial positive feedback loop. As a result, a gain and gain-bandwidth product performance similar to that of an amplifier using a gate-driven approach is obtained. Output rail-to-rail operation is achieved by means of a push-pull Stage, which is biased in class-AB by using a static feedback loop, thus avoiding frequency limitations inherent in dynamic-feedback tuning schemes. The proposed two-Stage operational amplifier was designed to operate with a 1-V supply, and a test chip prototype was fabricated in 0.35-mum standard CMOS technology. The experimental performance features an open-loop DC gain higher than 76 dB and a closed-loop unity-gain bandwidth above 8 MHz when a 1-MOmegapar17-pF load is connected to the amplifier output.

  • constant g sub m constant slew rate high bandwidth low voltage rail to rail cmos Input Stage for vlsi cell libraries
    IEEE Journal of Solid-state Circuits, 2003
    Co-Authors: J M Carrillo, J F Duquecarrillo, G Torelli, J L Ausin
    Abstract:

    This paper introduces a general-purpose low-voltage rail-to-rail Input Stage suitable for analog and mixed-signal applications. The proposed circuit provides, simultaneously, constant small-signal and large-signal behaviors over the entire Input common-mode voltage range, while imposing no appreciable constraint for high-frequency operation. In addition, the accuracy of the circuit does not rely on any strict matching of the devices, unlike most of the traditional approaches based on complementary Input pairs, which need to compensate for the difference in mobility between electrons and holes with the transistor aspect ratios. Also, the technique is compatible with deep submicrometer CMOS devices, where the familiar voltage-to-current square law in saturation is not completely satisfied. Based on the proposed Input Stage, a transconductor with rail-to-rail Input common-mode range and an Input/output rail-to-rail operational amplifier were developed. Both cells were designed to operate with a 3-V single supply and fabricated in standard 0.8-/spl mu/m CMOS technology. Experimental results are provided.

  • constant g sub m constant slew rate high bandwidth low voltage rail to rail cmos Input Stage for vlsi cell libraries
    International Symposium on Circuits and Systems, 2003
    Co-Authors: J M Carrillo, J F Duquecarrillo, G Torelli, J L Ausin
    Abstract:

    This paper introduces a general-purpose low-voltage rail-to-rail Input Stage suitable for analog and mixed-signal applications. The proposed scheme provides, simultaneously, constant small-signal and large-signal behaviors over the entire Input common-mode voltage range, whilst imposing no appreciable constraint for high-frequency operation. In addition, the technique does not rely on any strict matching condition between complementary differential pairs, and is compatible with deep submicron CMOS devices, where the familiar voltage-to-current square-law in saturation is not completely satisfied. Experimental results on integrated prototypes are provided.

Anantha P Chandrakasan - One of the best experts on this subject based on the ideXlab platform.

  • a noise efficient 36 nv surd hz chopper amplifier using an inverter based 0 2 v supply Input Stage
    IEEE Journal of Solid-state Circuits, 2017
    Co-Authors: Frank M Yaul, Anantha P Chandrakasan
    Abstract:

    This paper presents an analog front end (AFE) that achieves a high noise efficiency by using a chopper amplifier with a 0.2-V supply inverter-based Input Stage followed by a 0.8-V supply Stage. The high Input-Stage current needed to reduce the Input-referred noise is drawn from the 0.2-V supply, significantly reducing power consumption. The 0.8 V Stage provides high gain and signal swing, improving linearity. Biasing and common-mode rejection techniques for the ultra-low-voltage Stage are presented. The AFE is implemented in a 0.18 $\mu \text{m}$ CMOS process and integrates the chopper low-noise instrumentation amplifier, a programmable-gain amplifier, and an antialiasing filter. The AFE consumes 0.79 $\mu \text{W}$ and achieves a competitive power efficiency factor (PEF) of 1.6 and an Input noise of 0.94 $\mu \text{V}_{\text {rms}}$ integrated from 0.5 to 670 Hz while maintaining a 36 nV/ $\surd $ Hz Input noise density down to 0.5 Hz. The included 0.8/0.2-V buck converter may be used to provide the 0.2-V supply at 72%–74% efficiency without significantly increasing noise, yielding a PEF of 1.8.

  • a noise efficient 36 nv surd hz chopper amplifier using an inverter based 0 2 v supply Input Stage
    IEEE Journal of Solid-state Circuits, 2017
    Co-Authors: Frank M Yaul, Anantha P Chandrakasan
    Abstract:

    This paper presents an analog front end (AFE) that achieves a high noise efficiency by using a chopper amplifier with a 0.2-V supply inverter-based Input Stage followed by a 0.8-V supply Stage. The high Input-Stage current needed to reduce the Input-referred noise is drawn from the 0.2-V supply, significantly reducing power consumption. The 0.8 V Stage provides high gain and signal swing, improving linearity. Biasing and common-mode rejection techniques for the ultra-low-voltage Stage are presented. The AFE is implemented in a 0.18 $\mu \text{m}$ CMOS process and integrates the chopper low-noise instrumentation amplifier, a programmable-gain amplifier, and an antialiasing filter. The AFE consumes 0.79 $\mu \text{W}$ and achieves a competitive power efficiency factor (PEF) of 1.6 and an Input noise of 0.94 $\mu \text{V}_{\text {rms}}$ integrated from 0.5 to 670 Hz while maintaining a 36 nV/ $\surd $ Hz Input noise density down to 0.5 Hz. The included 0.8/0.2-V buck converter may be used to provide the 0.2-V supply at 72%–74% efficiency without significantly increasing noise, yielding a PEF of 1.8.

Remco J. Wiegerink - One of the best experts on this subject based on the ideXlab platform.

  • Rail-to-rail constant-g _ m Input Stage and class AB output Stage for low-voltage CMOS op amps
    Analog Integrated Circuits and Signal Processing, 1994
    Co-Authors: Jacob H. Botma, Remco J. Wiegerink, Sander L. J. Gierkink, Roelof F. Wassenaar
    Abstract:

    In this paper an Input Stage and an output Stage are presented for application in low-voltage CMOS operational amplifiers. The Input Stage operates in strong inversion and has a rail-to-rail common-mode Input voltage range. The transconductance ( g _ m ) is insensitive to the common-mode Input voltage. The class AB output Stage has a rail-to-rail output range. A class AB control circuit prevents any transistors in the output Stage from switching off. This improves the large-signal high-frequency behavior and the step response of the amplifier. A complete two-Stage Op Amp employing the proposed Input and output Stages was realized in a semi-custom CMOS process with minimum channel lengths of 10 µ m and transistor threshold voltages of approximately 0.7 V. The measured minimum supply voltage is 2.5 V. The measured Input voltage range exceeds the supply rails and the output voltage reaches both rails within 130 mV. The unity-gain bandwidth of the complete Op Amp is severely limited by the long channel lengths. Simulations show that a unity-gain bandwidth of 7 MHz is feasible if 2.5 µ m channel lengths are used.

  • CMOS low-voltage operational amplifiers with constant-g_m rail-to-rail Input Stage
    Analog Integrated Circuits and Signal Processing, 1994
    Co-Authors: Ron Hogervorst, Remco J. Wiegerink, Peter A. L. Jong, Jeroen Fonderie, Roelof F. Wassenaar, Johan H. Huijsing
    Abstract:

    Two 3.3-V operational amplifiers with constant- g _ m rail-to-rail Input Stage and rail-to-rail output Stage are presented. The constant transconductance ( g _ m ) ensures a constant unity-gain frequency within the whole commonmode Input range. Two new methods to control the g _ m are introduced. Both operational amplifiers use the same rail-to-rail output Stage. The operational amplifiers have been integrated in a CMOS semicustom process with transistor lengths of 10 µ m. The common-mode Input voltage swing extends beyond the positive supply rail by 400 mV and beyond the negative supply rail by 200 mV. The output voltage is able to reach within 130 mV of the supply rails. The output current of the operational amplifiers is 2 mA and the voltage gain is 85 dB. The unity-gain frquency is 165 kHz, which is mainly limited by the relatively long transistor lengths of 10 µ m. In another process with channel lengths of 2 µ m, simulation results showed that a unity-gain frequency of 4 MHz can easily be obtained.

  • CMOS low-voltage operational amplifiers with constant-G/sub m/ rail-to-rail Input Stage
    Analog Integrated Circuits and Signal Processing, 1994
    Co-Authors: Ron Hogervorst, Remco J. Wiegerink, Peter A. L. Jong, Jeroen Fonderie, Roelof F. Wassenaar, Johan H. Huijsing
    Abstract:

    Two 3-V CMOS low-voltage operational amplifiers (op-amps) with constant transconductance (g/sub m/) rail-to-rail Input Stages are presented. The constant g/sub m/ ensures a constant unity-gain frequency within the whole common-mode Input range. Two new methods to control the g/sub m/ of the Input Stage are introduced. The op-amps contain the same class-AB output Stage with rail-to-rail output swing. The common-mode Input voltage swing extends the positive supply rail by 600 mV and the negative supply rail by 200 mV. The output voltage can reach the supply rails within 130 mV. The output current of the op-amps was limited to +or-2 mA, voltage gain was 85 dB, and the unity-gain frequency was 165 kHz. The op-amps were integrated in a semicustom CMOS process with transistor lengths of 10 mu m. >

  • a low voltage cmos op amp with a rail to rail constant g sub m Input Stage and a class ab rail to rail output Stage
    International Symposium on Circuits and Systems, 1993
    Co-Authors: J.h. Botma, R F Wassenaar, Remco J. Wiegerink
    Abstract:

    A low-voltage two-Stage operational amplifier (op-amp) is presented. The op-amp features rail-to-rail operation and has an Input Stage with a constant transconductance (g/sub m/) over the entire common-mode Input range. The Input Stage consists of an n- and a p-MOS differential pair connected in parallel. The constant g/sub m/ is accomplished by regulating the tail-currents with the aid of an MOS translinear (MTL) circuit. The resulting g/sub m/ is constant within 5%. The common-source output Stage employs a feedback circuit which also contains an MTL circuit. This feedback circuit ensures class AB operation and prevents the transistors in the output Stage from cutting off. The op-amp isi realized in a semi-custom CMOS process with minimum channel lengths of 10/spl mu/m. Simulations show that the minimum supply voltage is less than 2.5 V. A unity gain bandwidth of 550 kHz and a DC voltage gain larger than 80 dB are feasible. The Input range exceeds the supply rails, whereas the output range reaches the rails within 130 mV. >

  • Simple rail-to-rail low-voltage constant-transconductance CMOS Input Stage in weak inversion
    Electronics Letters, 1993
    Co-Authors: J.h. Botma, Roelof F. Wassenaar, Remco J. Wiegerink
    Abstract:

    A CMOS Input Stage for operational amplifiers is presented. To obtain a rail-to-rail Input range an nMOS and a pMOS differential pair are driven in parallel. Both differential pairs operate in weak inversion. With the help of only four additional transistors a transconductance g m is obtained which is independent of the common Input voltage. This extension does not increase the minimum required supply voltage