The Experts below are selected from a list of 37593 Experts worldwide ranked by ideXlab platform

M. Potkonjak - One of the best experts on this subject based on the ideXlab platform.

  • Fingerprinting techniques for field-programmable gate array Intellectual Property Protection
    IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2001
    Co-Authors: John Lach, William H. Mangione-smith, M. Potkonjak
    Abstract:

    As current computer-aided design (CAD) tool and very large scale integration technology capabilities create a new market of reusable digital designs, the economic viability of this new core-based design paradigm is pending on the development of techniques for Intellectual Property Protection. This work presents the first technique that leverages the unique characteristics of field-programmable gate arrays (FPGAs) to protect commercial investment in Intellectual Property through fingerprinting. A hidden encrypted mark is embedded into the physical layout of a digital circuit when it is placed and routed onto the FPGA. This mark uniquely identifies both the circuit origin and original circuit recipient, yet is difficult to detect and/or remove, even via recipient collusion. While this approach imposes additional constraints on the backend CAD tools for circuit place and route, experiments indicate that the performance and area impacts are minimal.

  • Behavioral synthesis techniques for Intellectual Property Protection
    Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361), 1999
    Co-Authors: I. Hong, M. Potkonjak
    Abstract:

    The economic viability of the reusable core-based design paradigm depends on the development of techniques for Intellectual Property Protection. We introduce the first dynamic watermarking technique for protecting the value of Intellectual Property of CAD and compilation tools and reusable core components. The essence of the new approach is the addition of a set of design and timing constraints which encodes the author's signature. The constraints are selected in such a way that they result in minimal hardware overhead while embedding the signature which is unique and difficult to detect, remove and forge. We establish the first set of relevant metrics which forms the basis for the quantitative analysis, evaluation, and comparison of watermarking techniques. We develop a generic approach for signature data hiding in designs, which is applicable in conjunction with an arbitrary behavioral synthesis task, such as scheduling assignment, allocation, and transformations. Error correcting codes are used to augment the Protection of the signature data from tampering attempts. On a large set of design examples, studies indicate the effectiveness of the new approach in a sense that the signature data, which are highly resilient, difficult to detect and remove, and yet easy to verify, can be embedded in designs with very low hardware overhead.

  • Robust FPGA Intellectual Property Protection through multiple small watermarks
    Proceedings 1999 Design Automation Conference (Cat. No. 99CH36361), 1999
    Co-Authors: J. Lach, W.h. Mangione-smith, M. Potkonjak
    Abstract:

    A number of researchers have proposed using digital marks to provide ownership identification for Intellectual Property. Many of these techniques share three specific weaknesses: complexity of copy detection, vulnerability to mark removal after revelation for ownership verification, and mark integrity issues due to partial mark removal. This paper presents a method for watermarking field programmable gate array (FPGA) Intellectual Property (IP) that achieves robustness by responding to these three weaknesses. The key technique involves using secure hash functions to generate and embed multiple small marks that are more detectable, verifiable, and secure than existing IP Protection techniques.

  • Copy detection for Intellectual Property Protection of VLSI designs
    1999 IEEE ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051), 1999
    Co-Authors: A.b. Kahng, S. Mantik, D. Kirovski, M. Potkonjak, J.l. Wong
    Abstract:

    We give the first study of copy detection techniques for VLSI CAD applications; these techniques are complementary to previous watermarking-based IP Protection methods in finding and proving improper use of design IP. After reviewing related literature (notably in the text processing domain), we propose a generic methodology for copy detection based on determining basic elements within structural representations of solutions (IPs), calculating (context-independent) signatures for such elements, and performing fast comparisons to identify potential violators of IP rights. We give example implementations of this methodology in the domains of scheduling, graph coloring and gate-level layout; experimental results show the effectiveness of our copy detection schemes as well as the low overhead of implementation. We remark on open research areas, notably the potentially deep and complementary interaction between watermarking and copy detection.

  • Intellectual Property Protection by watermarking combinational logic synthesis solutions
    1998 IEEE ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287), 1998
    Co-Authors: D. Kirovski, Yean-yow Hwang, M. Potkonjak, J. Cong
    Abstract:

    The Intellectual Property business model is vulnerable to a number of potentially devastating obstructions, such as misappropriation and Intellectual Property fraud. We propose a new method for Intellectual Property Protection which facilitates design watermarking at the combinational logic synthesis level. We developed protocols for embedding designer- and/or tool-specific information into a logic network while performing multi-level logic minimization and technology mapping. We demonstrate that the difficulty of erasing an author's signature or finding another signature in the synthesized design can be made arbitrarily computationally difficult. We also developed a statistical method which enables us to establish the strength of the proof of authorship. The watermarking method has been tested on a standard set of real-life benchmarks where an exceptionally high probability of authorship has been achieved with a negligible overhead in solution quality.

Erkko Autio - One of the best experts on this subject based on the ideXlab platform.

  • Intellectual Property Protection and the formation of entrepreneurial growth aspirations
    Strategic Entrepreneurship Journal, 2010
    Co-Authors: Erkko Autio, Zoltan J Acs
    Abstract:

    Applying real options logic, we build and test a multilevel model that explicates the influence of a country's Intellectual Property Protection regime on the effect of an individual's human and financial capital on entrepreneurial growth aspirations. The results suggest that the strength of the Intellectual Property regime moderates negatively the relationship between an individual's education and entrepreneurial growth aspirations; and it moderates positively the relationship between an individual's household income and growth aspirations. Intellectual Property Protection, thereby, encourages specialization amongst differently qualified entrepreneurs. Our findings support claims that strategic entrepreneurial behaviors cannot be fully understood without giving attention to the context in which those behaviors are observed. Copyright © 2010 Strategic Management Society.

  • Intellectual Property Protection and the formation of entrepreneurial growth aspirations
    Strategic Entrepreneurship Journal, 2010
    Co-Authors: Erkko Autio
    Abstract:

    Applying real options logic, we build and test a multi-level model that explicates the influence of a country’s Intellectual Property Protection regime on the effect of human and financial capital on growth aspirations. The results suggest that the strength of the Intellectual Property regime moderates negatively the relationship between an individual's education and entrepreneurial growth aspirations; and it moderates positively the relationship between an individual’s household income and growth aspirations. Intellectual Property Protection thereby encourages specialization amongst differently qualified entrepreneurs. Our findings support claims that strategic entrepreneurial behaviors cannot be fully understood without giving attention to the context in which those behaviors are observed.

Sunil Kanwar - One of the best experts on this subject based on the ideXlab platform.

  • business enterprise r d technological change and Intellectual Property Protection
    Economics Letters, 2007
    Co-Authors: Sunil Kanwar
    Abstract:

    Abstract Very little empirical evidence exists on the relationship between Intellectual Property rights and innovation. Existing studies tend to be indirect and do not consider the influence of IPRs on innovation per se; nor do they adequately allow for the endogeneity of IPRs. Correcting for these omissions, we show that the strength of Intellectual Property Protection has a strong positive influence on innovation.

  • does Intellectual Property Protection spur technological change
    Oxford Economic Papers, 2003
    Co-Authors: Sunil Kanwar, Robert E. Evenson
    Abstract:

    Of the diverse factors motivating technological change, one factor that has received increasing attention in the recent past has been the Protection of Intellectual Property rights. Given fairly recent changes in the international policy ethos where a regime of stronger Intellectual Property Protection has become a fait accompli for most developing countries, it is of some significance to ask whether more stringent Protection of Intellectual Property does indeed encourage innovation. And this is the question which this paper examines, utilising cross-country panel data on R&D investment, patent Protection and other country-specific characteristics spanning the period 1981-1990. The evidence unambiguously indicates the significance of Intellectual Property rights as incentives for spurring innovation.

  • Does Intellectual Property Protection spur technological change?
    Oxford Economic Papers, 2003
    Co-Authors: Sunil Kanwar
    Abstract:

    Of the diverse factors motivating technological change, one factor that has received increasing attention in the recent past has been the Protection of Intellectual Property rights. Given fairly recent changes in the international policy ethos where a regime of stronger Intellectual Property Protection has become a fait accompli for most developing countries (and the developed too), it is of some significance to ask whether more stringent Protection of Intellectual Property does indeed encourage innovation. And this is the question which this paper examines, utilising cross-country panel data on R&D investment, patent Protection and other country-specific characteristics spanning the period 1981-95. The evidence unambiguously indicates the significance of Intellectual Property rights as incentives for spurring innovation.

Miodrag Potkonjak - One of the best experts on this subject based on the ideXlab platform.

  • 20 Years of research on Intellectual Property Protection
    2017 IEEE International Symposium on Circuits and Systems (ISCAS), 2017
    Co-Authors: Miodrag Potkonjak, Farinaz Koushanfar, Gang Qu, Chip-hong Chang
    Abstract:

    VLSI Intellectual Property (IP) reuse based design methodology was adopted by the semiconductor industry in the early 1990's and how to protect design IPs from piracy and misuse has since been a challenging problem. 2017 marks the 20th anniversary of the IP Protection development and working group was founded and the first series of IP watermarking papers were published. In this paper, we survey the efforts from industry, government, and academia on securing the design IPs in the past 20 years with focus on development from academia side.

  • Quantitative Intellectual Property Protection Using Physical-Level Characterization
    IEEE Transactions on Information Forensics and Security, 2013
    Co-Authors: Ani Nahapetian, Miodrag Potkonjak
    Abstract:

    Hardware metering, the extraction of unique and persistent identifiers (IDs), is a crucial process for numerous integrated circuit (IC) Intellectual Property Protection tasks. The currently known hardware metering approaches, however, are subject to alternations due to device aging, since they employ unstable manifestational IC properties. We, on the other hand, have developed the first robust hardware metering approach by using physical-level gate proprieties for ID generation. By using effective channel length, which is resilient to aging, and threshold voltage, which is essentially independent across gates and suitable for calculating the uniqueness of the IDs, we overcome the limitations of the existing approaches. Also, despite the increase in threshold voltage that occurs with aging, the original threshold voltage value can be extracted through intentional IC aging. Our ID generation procedure first employs two types of side channels, namely switching power and leakage power, to extract metering results for each gate. Next, we show that localized delay measurements alone are sufficient for accurate characterization of large sets of gates. Finally, by using threshold voltage for ID creation, we are able to obtain low probabilities of coincidence between legitimate and pirated ICs. The application of the approach to a set of benchmarks quantitatively establishes the effectiveness of the new hardware metering approach.

  • behavioral synthesis techniques for Intellectual Property Protection
    ACM Transactions on Design Automation of Electronic Systems, 2005
    Co-Authors: Farinaz Koushanfar, I. Hong, Miodrag Potkonjak
    Abstract:

    We introduce dynamic watermarking techniques for protecting the value of Intellectual Property of CAD and compilation tools and reusable design components. The essence of the new approach is the addition of a set of design and timing constraints which encodes the author's signature. The constraints are selected in such a way that they result in a minimal hardware overhead while embedding a unique signature that is difficult to remove and forge. Techniques are applicable in conjunction with an arbitrary behavioral synthesis task such as scheduling, assignment, allocation, transformation, and template matching.On a large set of design examples, studies indicate the effectiveness of the new approach that results in signature data that is highly resilient, difficult to detect and remove, and yet is easy to verify and can be embedded in designs with very low hardware overhead. For example, the probability that the same design with the embedded signature is obtained by any other designers by themselves is less than 1 in 10102, and no register overhead was incurred. The probability of tampering, the probability that part of the embedded signature can be removed by random attempts, is shown to be extremely low, and the watermark is additionally protected from such tampering with error-correcting codes.

  • Intellectual Property Protection in vlsi designs theory and practice
    2003
    Co-Authors: Gang Qu, Miodrag Potkonjak
    Abstract:

    Part I Design security - from the point of view of an embedded system designer: Intellectual Property in reuse-based design constraint based IP Protection - examples constraint-based IP Protection - overview summary. Part II Watermarking and fingerprinting for digital data: software Protection summary. Part III Constraint-based watermarking for VLSI IP Protection: challenges and the general approach mathematical foundations for the constraint-based watermarking techniques optimization-intensive watermarking techniques summary. Part IV Fingerprinting for IP user's right Protection: motivation and challenges fingerprinting objectives iterative fingerprinting techniques constraint-based fingerprinting techniques summary. Part V Copy detection mechanisms for IP authentication: introduction pattern matching based techniques forensic engineering techniques public detectable watermarking techniques summary.

  • Watermarking techniques for Intellectual Property Protection
    Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175), 1998
    Co-Authors: Andrew B. Kahng, S. Mantik, Philip Tucker, John Lach, Igor L Markov, William H. Mangione-smith, Miodrag Potkonjak, Hongxia Wang, Greg Wolfe
    Abstract:

    Digital system designs are the product of valuable effort and know-how. Their embodiments, from software and HDL program down to device-level netlist and mask data, represent carefully guarded Intellectual Property (IP). Hence, design methodologies based on IP reuse require new mechanisms to protect the rights of IP producers and owners. This paper establishes principles of watermarking-based IP Protection, where a watermark is a mechanism for identification that is (i) nearly invisible to human and machine inspection, (ii) difficult to remove, and (iii) permanently embedded as an integral part of the design. We survey related work in cryptography and design methodology, then develop desiderata, metrics and example approaches-centering on constraint-based techniques-for watermarking at various stages of the VLSI design process.

Edwin Mansfield - One of the best experts on this subject based on the ideXlab platform.

  • Intellectual Property Protection and u s foreign direct investment
    The Review of Economics and Statistics, 1996
    Co-Authors: Edwin Mansfield
    Abstract:

    This is one of the first empirical studies of the relationship between a developing country's system of Intellectual Property Protection and the volume and composition of U.S. foreign direct investment in that country. Based on data obtained from almost one hundred U.S. firms regarding their perceptions of how weak or strong such Protection is in various countries, the authors' results are consistent with the view that a country's system of Intellectual Property Protection influences the volume and composition of U.S. foreign direct investment. Copyright 1996 by MIT Press.

  • Intellectual Property Protection foreign direct investment and technology transfer
    1994
    Co-Authors: Edwin Mansfield
    Abstract:

    Policy makers and analysts require a better understanding of the effect, if any, that a developing country's system of Intellectual Property rights Protection has on the transfer of technology to that country through foreign direct investment. It is frequently argued that relatively weak Intellectual Property rights Protection in a developing country may lower the probability that multinational firms will invest there, and that, even if they do invest there, they may be willing (because of weak Intellectual Property Protection) to invest only in wholly owned subsidiaries (not joint ventures with local partners) or to transfer only older technologies. But this and other hypotheses have been challenged, and there is very little evidence one way or the other. This paper is an attempt to help fill this important gap. Based on a combination of survey data, interview studies, and statistical analysis, the author finds that the strength or weakness of a country's system of Intellectual Property Protection seems to have a substantial effect, particularly in high-technology industries, on the kinds of technology transferred by many U.S. firms to that country. Also, this factor seems to influence the composition and extent of U.S. direct investment there, although the size of the effects seems to differ from industry to industry.