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Mohammed Ismail - One of the best experts on this subject based on the ideXlab platform.
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Introduction to TEG-Based Power Management Unit
Analog Circuits and Signal Processing, 2020Co-Authors: Dima Kilani, Baker Mohammad, Mohammad Alhawari, Hani Saleh, Mohammed IsmailAbstract:This chapter discusses in details the state of the art thermoelectric generator (TEG)-based Power Management Unit (PMU) circuits in the literature. First, we introduce the basic concept of the TEG device and how the electricity is generated from heat. Then, we explain the interface circuit needed when using TEG device. Finally, we present the existed TEG-based PMU in the literature.
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Cascaded Power Management Unit characterization for TEG-based IoT devices in 65 nm CMOS
Microelectronics Journal, 2019Co-Authors: Dima Kilani, Baker Mohammad, Mohammad Alhawari, Hani Saleh, Mihai Sanduleanu, Mohammed IsmailAbstract:Abstract This paper presents a detailed characterization of several Power Management Units (PMUs) targeting wearable healthcare IoT device Powered by a thermoelectric generator (TEG). The characterization is based on silicon measurements where the TEG-PMUs are fabricated in 65 nm CMOS. Power efficiency, area and voltage ripple have been measured for different PMU topologies. In this paper, three various TEG-PMUs are characterized and compared: design 1: switched inductor (SI) boost converter followed by a switched capacitor (SC) buck converter, design 2: SI followed by LDO regulator and design 3: SI followed by two voltage regulators in series: SC and LDO. The measured results show that the end-to-end Power efficiency is constant for the three PMU design options at a certain load Power giving that the input Power is fixed due to MPPT. The maximum end-to-end Power efficiency is 65%. However, the voltage regulation range of the LDO is better than the SC due to the design of the LDO that is capable of generating a load voltage equal to or smaller than the input voltage. Design 2 and design 3 which have the LDO regulator as the last stage has lower voltage ripple of 12 mV compared to 35 mV in design 1 where SC drives the load. The SI boost converter consumes an area of 0.036 mm 2 and it requires off-chip inductor. The SC regulator occupies the largest area of 0.495 mm 2 whereas the LDO regulator occupies the smallest area of 0.0357 mm 2 .
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ISCAS - A Charge Pump Based Power Management Unit With 66%-Efficiency in 65 nm CMOS
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018Co-Authors: Abdulqader Mahmoud, Baker Mohammad, Mohammad Alhawari, Hani Saleh, Mohammed IsmailAbstract:This paper presents a single stage Power Management Unit that includes an enhanced stage-switch Dickson charge pump (DCP) to boost and regulate a low input voltage. A new switching mechanism is presented to significantly reduce the losses encountered in conventional DCP switches. Frequency and stage modulation are utilized in the proposed design. The stage modulation provides different gain levels (coarse) and the frequency modulation tunes the voltage level and regulates the output voltage based on a pre-determined reference voltage. Using four stages charge pump, silicon measurement results in 65 nm CMOS technology show a maximum efficiency of 66% at input voltage of 0.7 V and output Power of 27 μW. The system supports a range of load current between 0.1 μA − 34 μA with a maximum operating frequency of 1.8MHz. The proposed system supports an input voltage range from 0.55 to 0.7 V which can be used in energy harvesting applications such as solar and thermal harvesting.
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a multi input multi output Power Management Unit using dickson charge pump for energy harvesting applications
International Midwest Symposium on Circuits and Systems, 2016Co-Authors: Abdulqader Mahmoud, Baker Mohammad, Mohammad Alhawari, Hani Saleh, Mohammed IsmailAbstract:This paper presents a multi-input, multi-output, frequency modulated Dickson charge pump targeting Power Management Unit in energy harvesting applications. Four stages Dickson charge pump is designed and simulated using 65nm CMOS. The design has an input voltage range from 0.4V-0.6V and generates a regulated output voltage of 0.6V, 0.8V and 1V using pulse frequency modulation (PFM). SPICE simulations show that a maximum end-to-end efficiency of 33% at 200 μW at an input of 0.6V is achieved. The proposed charge pump supports a current range from 1uA to 200μA with a maximum operating frequency of 2.4 MHz. The proposed design could help in reducing the complexity of Power Management Unit in energy harvesting applications.
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Power Management Unit for multi source energy harvesting in wearable electronics
International Midwest Symposium on Circuits and Systems, 2016Co-Authors: Mohammad Alhawari, Baker Mohammad, Hani Saleh, Temesghen Tekeste, Mohammed IsmailAbstract:This paper presents a Power Management Unit (PMU) architecture for multi-source energy harvesting system in wearable devices. The energy harvesting system utilizes a thermal and vibration harvesters as energy sources. In addition, the PMU is designed to control the harvested energy as well as to manage the Power delivered to an ECG processor. Further, the PMU generates different signals to enable and disable the processor depending on the available energy. The ECG processor analyzes ECG signals and predicts ventricular arrhythmia (VA). The ECG processor is a multi-voltage design that uses a 0.6V for the processing core and a 1V for the SRAM. Simulation results of the PMU shows the operation of the ECG processor at different energy states in different modes of operation. The proposed architecture could help wearable electronics to run at their optimum energy point to increase their life time.
Mingoo Seok - One of the best experts on this subject based on the ideXlab platform.
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a 0 78 µw 96 ch deep sub vt neural spike processor integrated with a nanowatt Power Management Unit
European Solid-State Circuits Conference, 2018Co-Authors: Pavan Kumar Chundi, Sung Kim, Zhewei Jiang, Minhao Yang, Joonseong Kang, Seungchul Jung, Sang Joon Kim, Mingoo SeokAbstract:We present a sub-µW Neural Spike Processor integrated with a Power Management Unit (PMU) for on-implant processing in motor intention decoding, demonstrating: (i) among the highest level of integration including spike detection, feature extraction, sorting, the first half of decoding, which reduces wireless data rate by more than 4 orders of magnitude; (ii) on-chip PMU integration enabling the system directly Powered by harvesters; (iii) the lowest Power dissipation of 0.78µW for 96 channels, 21x lower than the prior art at a comparable/better accuracy.
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ESSCIRC - A 0.78-µW 96-Ch. Deep Sub-Vt Neural Spike Processor Integrated with a Nanowatt Power Management Unit
ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC), 2018Co-Authors: Pavan Kumar Chundi, Sung Kim, Zhewei Jiang, Minhao Yang, Joonseong Kang, Seungchul Jung, Sang Joon Kim, Mingoo SeokAbstract:We present a sub-µW Neural Spike Processor integrated with a Power Management Unit (PMU) for on-implant processing in motor intention decoding, demonstrating: (i) among the highest level of integration including spike detection, feature extraction, sorting, the first half of decoding, which reduces wireless data rate by more than 4 orders of magnitude; (ii) on-chip PMU integration enabling the system directly Powered by harvesters; (iii) the lowest Power dissipation of 0.78µW for 96 channels, 21x lower than the prior art at a comparable/better accuracy.
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near vt adaptive microprocessor and Power Management Unit system based on direct error regulation
European Solid-State Circuits Conference, 2017Co-Authors: Seongjong Kim, Joao P Cerqueira, Mingoo SeokAbstract:We present a co-design approach of a near-threshold voltage adaptive microprocessor and Power-Management Unit (PMU). It consists of (i) a microprocessor with in-situ error detection and correction; (ii) an integrated 63-ratio switched-capacitor DC-DC converter; and (iii) an error-based controller which regulates the timing error rate of microprocessor directly instead of indirectly through regulating PMU output voltage. The measurement of the prototyped chips shows a significant improvement in system-level efficiency that considers both Power conversion and consumption.
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ESSCIRC - Near-Vt adaptive microprocessor and Power-Management-Unit system based on direct error regulation
ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference, 2017Co-Authors: Seongjong Kim, Joao P Cerqueira, Mingoo SeokAbstract:We present a co-design approach of a near-threshold voltage adaptive microprocessor and Power-Management Unit (PMU). It consists of (i) a microprocessor with in-situ error detection and correction; (ii) an integrated 63-ratio switched-capacitor DC-DC converter; and (iii) an error-based controller which regulates the timing error rate of microprocessor directly instead of indirectly through regulating PMU output voltage. The measurement of the prototyped chips shows a significant improvement in system-level efficiency that considers both Power conversion and consumption.
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Triple-Mode, Hybrid-Storage, Energy Harvesting Power Management Unit: Achieving High Efficiency Against Harvesting and Load Power Variabilities
IEEE Journal of Solid-State Circuits, 2017Co-Authors: Jae-sun Seo, Ioannis Kymissis, Mingoo SeokAbstract:This paper presents a triple-mode, hybrid storage, energy-harvesting Power Management Unit (EH PMU) that interfaces a photovoltaic cell, a regulated load, and a rechargeable battery. The objective is to maximize the end-to-end conversion efficiency of the EH PMU against temporal mismatch and variabilities of harvesting and load Power. To minimize the involvement (charging or discharging) of a battery in the voltage conversion process, the proposed hybrid energy storage employs both battery and capacitor, which increases transient energy buffering capability and reduces the overall Power conversion loss. Measurement results with 65-nm test chips show that the proposed EH PMU can achieve up to 2.2 $\times $ higher end-to-end conversion efficiency than the conventional dual-mode architectures under testing cases emulating realistic load and harvesting Power variabilities. We also devised a framework for the system design to guide capacitor sizing, buffering voltage range selection, and end-to-end efficiency tradeoffs.
Massimo Alioto - One of the best experts on this subject based on the ideXlab platform.
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VLSI Circuits - Integrated Power Management and Microcontroller for Ultra-Wide Power Adaptation down to nW
2019 Symposium on VLSI Circuits, 2019Co-Authors: Longyang Lin, Saurabh Jain, Massimo AliotoAbstract:This paper presents a Power Management Unit (PMU) driving a microcontroller, and controlling a Power knob that enables adaptation to the sensed Power availability over an ultra-wide range, well beyond voltage scaling. Conventional battery-Powered operation is augmented with pure harvesting. Wide Power adaptation is enabled by comparator delay selfbiasing and zero-current switching scheme shared among all Power modes with single-cycle convergence.
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Integrated Power Management and Microcontroller for Ultra-Wide Power Adaptation down to nW
2019 Symposium on VLSI Technology, 2019Co-Authors: Longyang Lin, Saurabh Jain, Massimo AliotoAbstract:This paper presents a Power Management Unit (PMU) driving a microcontroller, and controlling a Power knob that enables adaptation to the sensed Power availability over an ultra-wide range, well beyond voltage scaling. Conventional battery-Powered operation is augmented with pure harvesting. Wide Power adaptation is enabled by comparator delay self-biasing and zero-current switching scheme shared among all Power modes with single-cycle convergence.
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“EChO” Reconfigurable Power Management Unit for Energy Reduction in Sleep-Active Transitions
IEEE Journal of Solid-State Circuits, 2013Co-Authors: Massimo Alioto, Elio Consoli, Jan M RabaeyAbstract:A novel reconfigurable switched-capacitor “EChO” Power Management Unit is introduced for ultra-low Power duty-cycled integrated systems (e.g., sensor nodes for critical event monitoring). “EChO” reduces the energy cost associated with sleep-to-active and active-to sleep transitions by 64% with an area overhead less than 1% and no impact on active mode operation. Analysis shows that approximately the same energy reduction is achieved over a very wide range of operating conditions and design constraints (e.g., ratio between flying and decoupling capacitances, granularity of the capacitor array). Measurements show 25-30% system Power saving for a 65-nm testchip implementation of the “EChO” PMU Powering a 16-kgate processing Unit and a 2-kbit SRAM at 0.55-V voltage in active mode, assuming a 1-s wakeup cycle, 6.25-12.5% activity and a processing task of 250 cycles. The technique can be synergistically employed with traditional reconfiguration techniques that focus on efficiency in active mode (ignoring active-sleep transitions) to sum up the benefits.
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echo Power Management Unit with reconfigurable switched capacitor converter in 65 nm cmos
Custom Integrated Circuits Conference, 2012Co-Authors: Massimo Alioto, Elio Consoli, Jan M RabaeyAbstract:In this paper, a novel reconfigurable Power Management Unit (PMU) is introduced. Its reconfigurable switched capacitor array permits for the first time to reduce the energy cost associated with sleep-to-active and active-to sleep transitions by 64%. This energy reduction comes at small area overhead (lower than 1%) and no penalty in active mode. Measurements on a 65-nm testchip comprising of PMU with integrated logic and memory show that energy savings enabled by our technique are in the order of 30% in practical cases.
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CICC - EChO Power Management Unit with reconfigurable switched-capacitor converter in 65 nm CMOS
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012Co-Authors: Massimo Alioto, Elio Consoli, Jan M RabaeyAbstract:In this paper, a novel reconfigurable Power Management Unit (PMU) is introduced. Its reconfigurable switched capacitor array permits for the first time to reduce the energy cost associated with sleep-to-active and active-to sleep transitions by 64%. This energy reduction comes at small area overhead (lower than 1%) and no penalty in active mode. Measurements on a 65-nm testchip comprising of PMU with integrated logic and memory show that energy savings enabled by our technique are in the order of 30% in practical cases.
Mohammad Alhawari - One of the best experts on this subject based on the ideXlab platform.
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Introduction to TEG-Based Power Management Unit
Analog Circuits and Signal Processing, 2020Co-Authors: Dima Kilani, Baker Mohammad, Mohammad Alhawari, Hani Saleh, Mohammed IsmailAbstract:This chapter discusses in details the state of the art thermoelectric generator (TEG)-based Power Management Unit (PMU) circuits in the literature. First, we introduce the basic concept of the TEG device and how the electricity is generated from heat. Then, we explain the interface circuit needed when using TEG device. Finally, we present the existed TEG-based PMU in the literature.
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Cascaded Power Management Unit characterization for TEG-based IoT devices in 65 nm CMOS
Microelectronics Journal, 2019Co-Authors: Dima Kilani, Baker Mohammad, Mohammad Alhawari, Hani Saleh, Mihai Sanduleanu, Mohammed IsmailAbstract:Abstract This paper presents a detailed characterization of several Power Management Units (PMUs) targeting wearable healthcare IoT device Powered by a thermoelectric generator (TEG). The characterization is based on silicon measurements where the TEG-PMUs are fabricated in 65 nm CMOS. Power efficiency, area and voltage ripple have been measured for different PMU topologies. In this paper, three various TEG-PMUs are characterized and compared: design 1: switched inductor (SI) boost converter followed by a switched capacitor (SC) buck converter, design 2: SI followed by LDO regulator and design 3: SI followed by two voltage regulators in series: SC and LDO. The measured results show that the end-to-end Power efficiency is constant for the three PMU design options at a certain load Power giving that the input Power is fixed due to MPPT. The maximum end-to-end Power efficiency is 65%. However, the voltage regulation range of the LDO is better than the SC due to the design of the LDO that is capable of generating a load voltage equal to or smaller than the input voltage. Design 2 and design 3 which have the LDO regulator as the last stage has lower voltage ripple of 12 mV compared to 35 mV in design 1 where SC drives the load. The SI boost converter consumes an area of 0.036 mm 2 and it requires off-chip inductor. The SC regulator occupies the largest area of 0.495 mm 2 whereas the LDO regulator occupies the smallest area of 0.0357 mm 2 .
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ISCAS - A Charge Pump Based Power Management Unit With 66%-Efficiency in 65 nm CMOS
2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018Co-Authors: Abdulqader Mahmoud, Baker Mohammad, Mohammad Alhawari, Hani Saleh, Mohammed IsmailAbstract:This paper presents a single stage Power Management Unit that includes an enhanced stage-switch Dickson charge pump (DCP) to boost and regulate a low input voltage. A new switching mechanism is presented to significantly reduce the losses encountered in conventional DCP switches. Frequency and stage modulation are utilized in the proposed design. The stage modulation provides different gain levels (coarse) and the frequency modulation tunes the voltage level and regulates the output voltage based on a pre-determined reference voltage. Using four stages charge pump, silicon measurement results in 65 nm CMOS technology show a maximum efficiency of 66% at input voltage of 0.7 V and output Power of 27 μW. The system supports a range of load current between 0.1 μA − 34 μA with a maximum operating frequency of 1.8MHz. The proposed system supports an input voltage range from 0.55 to 0.7 V which can be used in energy harvesting applications such as solar and thermal harvesting.
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a multi input multi output Power Management Unit using dickson charge pump for energy harvesting applications
International Midwest Symposium on Circuits and Systems, 2016Co-Authors: Abdulqader Mahmoud, Baker Mohammad, Mohammad Alhawari, Hani Saleh, Mohammed IsmailAbstract:This paper presents a multi-input, multi-output, frequency modulated Dickson charge pump targeting Power Management Unit in energy harvesting applications. Four stages Dickson charge pump is designed and simulated using 65nm CMOS. The design has an input voltage range from 0.4V-0.6V and generates a regulated output voltage of 0.6V, 0.8V and 1V using pulse frequency modulation (PFM). SPICE simulations show that a maximum end-to-end efficiency of 33% at 200 μW at an input of 0.6V is achieved. The proposed charge pump supports a current range from 1uA to 200μA with a maximum operating frequency of 2.4 MHz. The proposed design could help in reducing the complexity of Power Management Unit in energy harvesting applications.
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Power Management Unit for multi source energy harvesting in wearable electronics
International Midwest Symposium on Circuits and Systems, 2016Co-Authors: Mohammad Alhawari, Baker Mohammad, Hani Saleh, Temesghen Tekeste, Mohammed IsmailAbstract:This paper presents a Power Management Unit (PMU) architecture for multi-source energy harvesting system in wearable devices. The energy harvesting system utilizes a thermal and vibration harvesters as energy sources. In addition, the PMU is designed to control the harvested energy as well as to manage the Power delivered to an ECG processor. Further, the PMU generates different signals to enable and disable the processor depending on the available energy. The ECG processor analyzes ECG signals and predicts ventricular arrhythmia (VA). The ECG processor is a multi-voltage design that uses a 0.6V for the processing core and a 1V for the SRAM. Simulation results of the PMU shows the operation of the ECG processor at different energy states in different modes of operation. The proposed architecture could help wearable electronics to run at their optimum energy point to increase their life time.
E Sanchezsinencio - One of the best experts on this subject based on the ideXlab platform.
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an autonomous energy harvesting Power Management Unit with digital regulation for iot applications
IEEE Journal of Solid-state Circuits, 2016Co-Authors: Salvador Carreonbautista, Lilly Huang, E SanchezsinencioAbstract:Efforts towards energy-harvesting solutions are targeted for wireless sensor node applications and focus on performing maximum Power extraction and storing Power, yet efforts to deliver a regulated supply to voltage-sensitive blocks in Power-limited applications has yet to be fully achieved. This paper presents a low-Power, autonomous Power Management Unit (PMU) able to perform maximum Power point tracking for dc-type renewable sources. It includes a startup circuit fed directly from the renewable source. The PMU delivers a regulated output voltage through a digital LDO. The main step-up operation is performed through a dynamically controlled, Power-aware, capacitive dc–dc converter that performs the required voltage gain procedure. Then, the digital LDO receives the EH source Power density information from the dc–dc converter and provides regulation. Information about the source-Power density availability is passed on to the digital LDO in order to select the best pass device size from a bank of three arrays. The PMU allows Power consumption decrease by reducing the gate driving losses associated with large pass transistor devices, and it enhances efficiency. The system was fabricated in 180 nm CMOS process, and maximum end-to-end efficiency was measured at 57% with 1.75 mW of input Power.
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a Power Management Unit with 40 db switching noise suppression for a thermal harvesting array
IEEE Transactions on Circuits and Systems, 2015Co-Authors: Jorge Zarateroldan, Salvador Carreonbautista, Alfredo Costillareyes, E SanchezsinencioAbstract:A high efficiency, maximum Power point tracking (MPPT) Power Management Unit (PMU), with 3.6 ${\mmb\mu}{\bf W}$ quiescent Power, aimed at a thermoelectric generator (TEG) array is presented. The proposed energy harvesting PMU is made up of a boost converter with a cascaded capacitor-less low drop-out (CL-LDO) voltage regulator. The segmented approach allows the PMU to match the TEG array's changing dynamic series resistance via the boost converter and simultaneously provide voltage regulation with adaptive, high switching noise rejection via the CL-LDO. The boost converter's switching frequency $({f}_{{sw}})$ is tracked via a Sense-and-Control loop which modifies the CL-LDO's Power supply rejection (PSR) characteristics to place a notch in the PSR transfer function around the average ${f}_{{sw}}$ . Experimental results show an overall system efficiency better than 57% @ 1.6 V output voltage, PSR of 40 dB at ${ f}_{{sw}}$ , and a notch-tuning range of 15–65 kHz. The total active area is 0.93 ${mm}^{2}$ in 0.5 ${\mu}{m}$ CMOS.
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an ultra low Power Power Management Unit with 40db switching noise suppression for a 3 3 thermoelectric generator array with 57 maximum end to end efficiency
Custom Integrated Circuits Conference, 2014Co-Authors: Jorge Zarateroldan, Salvador Carreonbautista, Alfredo Costillareyes, E SanchezsinencioAbstract:A high efficiency, dynamically adaptable Power Management Unit (PMU) consuming less than 3μW, for an energy harvesting system based on a thermoelectric generator (TEG) array is presented. A boost converter with a cascaded low drop-out (LDO) voltage regulator comprises the proposed PMU. The design approach allows the PMU to reach maximum Power transfer by matching the TEG's dynamic series resistance and simultaneously provide adaptive switching noise rejection. The boost converter's switching frequency (fsw) is tracked via a background sense-and-control loop which modifies the LDO's Power supply rejection (PSR) characteristics to place a notch around the average fsw. Overall system efficiency is better than 57%, and PSR of -40dB at fsw are achieved. The total active area is 0.93 mm 2 in 0.5 μm CMOS.