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Yasar Gurbuz - One of the best experts on this subject based on the ideXlab platform.
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a phase calibration method for Vector Sum phase shifters using a self generated lut
IEEE Transactions on Circuits and Systems I-regular Papers, 2019Co-Authors: Ilker Kalyoncu, Emre Ozeren, Abdurrahman Burak, Omer Ceylan, Yasar GurbuzAbstract:This paper presents a new self-calibration method for Vector-Sum phase shifters (PS) to compensate for process variations and achieve reconfigurable operating frequency. The calibration system generates a look-up table for the control voltages of the variable-gain amplifiers of the PS to minimize the rms phase error at a frequency of interest. The calibration system consists of a coupled-line coupler, an amplifier, a power detector (PD), an analog-to-digital converter, and a data processing unit. In this calibration method, first, the amplitudes of IQ Vectors are swept and their powers are measured. Then, phase errors are calculated from these power measurements using the cosine formula. Finally, the Vector pairs providing the least phase error are chosen for each desired phase shift. The practicality of the proposed system is demonstrated by realizing a self-calibrated $X$ -band 7-b PS fabricated in IHP 0.25- $\mu \text{m}$ SiGe BiCMOS technology, including the on-chip coupler, amplifier, and PD. The calibration system improves the rms phase error by at least 1°, does not degrade the rms gain error, and increases the insertion loss by 1.6 dB. The self-calibrated PS achieves a 2° rms phase error across $X$ -band frequencies. The overall chip size is 2.6 mm2. The power conSumption of the PS and the overall system are 110 and 233 mW, respectively. This built-in calibration system mitigates process variation effects, and the performance of the PS can be optimized for any center frequency across $X$ -band.
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a 5 13 ghz 6 bit Vector Sum phase shifter with 3 5 dbm ip1db in 0 25 μm sige bicmos
Asia-Pacific Microwave Conference, 2017Co-Authors: Barbaros Cetindogan, Berktug Ustundag, Mehmet Kaynak, Abdurrahman Burak, Matthias Wietstruck, Yasar GurbuzAbstract:This paper presents a wideband Vector-Sum phase shifter (VSPS) with high phase resolution and high input-referered 1 dB compression point (IP1dB) which covers the full 360° phase range with 5.6° phase steps between 5–13 GHz in a commercial 0.25-μm SiGe BiCMOS technology. A transformer balun and an RC polyphase filter (PPF) are implemented for in-phase and quadrature phase (I/Q) reference Vector generation while the desired phase states are generated by an adder stage where the amplitudes of the I/Q reference Vectors are manipulated with digitally controlled variable gain amplifiers (VGAs). The measured root mean square (RMS) phase error of the VSPS is 7.8 dB. Thus, the VSPS achieves 6-bit phase resolution. IP1dB for the 1st state of the VSPS at 10 GHz is measured to be +3.5 dBm. Overall chip size of the VSPS IC is only 1.22×0.59 = 0.71 mm2, excluding the RF and the DC pads.
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a 6 bit Vector Sum phase shifter with a decoder based control circuit for x band phased arrays
IEEE Microwave and Wireless Components Letters, 2016Co-Authors: Barbaros Cetindogan, Emre Ozeren, Berktug Ustundag, Mehmet Kaynak, Yasar GurbuzAbstract:This letter presents a 6 bit Vector-Sum phase shifter with a novel control circuitry for X-band phased-arrays using a 0.25 $\mu$ m SiGe BiCMOS technology. A balanced active balun and highly accurate I/Q network are employed to generate the reference in-phase and quadrature Vectors. The desired phase is synthesized by modulating and Summing the generated reference Vectors using current steering VGAs that are controlled by a decoder based control circuit. The phase shifter resulted in a measured RMS phase error ${ between 9.6–11.7 GHz and ${ between 8.2–12 GHz, achieving 6 bit phase resolution. The chip size is 1.87 $\,\times\,$ 0.88 mm $^2$ , excluding pads. To the best of authors' knowledge, this is the first demonstration of a digitally controlled 6 bit Vector-Sum phase shifter for X-band.
Joel W Walker - One of the best experts on this subject based on the ideXlab platform.
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a complete solution classification and unified algorithmic treatment for the one and two step asymmetric s transverse mass tilde m _ mathrm t 2 event scale statistic
Journal of High Energy Physics, 2014Co-Authors: Joel W WalkerAbstract:The MT2 or "s-transverse mass" statistic was developed to associate a parent mass scale to a missing transverse energy signature, given that escaping particles are generally expected in pairs, while collider experiments are sensitive to just a single transverse momentum Vector Sum. This document focuses on the generalized extension of that statistic to asymmetric one- and two-step decay chains, with arbitrary child particle masses and upstream missing transverse momentum. It provides a unified theoretical formulation, complete solution classification, taxonomy of critical points, and technical algorithmic prescription for treatment of the MT2 event scale. An implementation of the described algorithm is available for download, and is also a deployable component of the author's selection cut software package AEACuS (Algorithmic Event Arbiter and Cut Selector). Appendices address combinatoric event assembly, algorithm validation, and a complete pseudocode.
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a complete solution classification and unified algorithmic treatment for the one and two step asymmetric s transverse mass tilde m _ mathrm t 2 event scale statistic
Journal of High Energy Physics, 2014Co-Authors: Joel W WalkerAbstract:The M T2, or “s-transverse mass”, statistic was developed to associate a parent mass scale to a missing transverse energy signature, given that escaping particles are generally expected in pairs, while collider experiments are sensitive to just a single transverse momentum Vector Sum. This document focuses on the generalized $$ {\tilde{M}}_{\mathrm{T}2} $$ extension of that statistic to asymmetric one- and two-step decay chains, with arbitrary child particle masses and upstream missing transverse momentum. It provides a unified theoretical formulation, complete solution classification, taxonomy of critical points, and technical algorithmic prescription for treatment of the $$ {\tilde{M}}_{\mathrm{T}2} $$ event scale. An implementation of the described algorithm is available for download, and is also a deployable component of the author’s selection cut software package AEACuS (Algorithmic Event Arbiter and Cut Selector). appendices address combinatoric event assembly, algorithm validation, and a complete pseudocode.
Hong Zheng - One of the best experts on this subject based on the ideXlab platform.
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determination of critical slip surface and safety factor of slope using the Vector Sum numerical manifold method and max min ant colony optimization algorithm
Engineering Analysis With Boundary Elements, 2021Co-Authors: Yongtao Yang, Jianhai Zhang, Hong ZhengAbstract:Abstract The numerical manifold method (NMM) has been used to solve geotechnical problems with valuable results. In this paper, a numerical model based on the NMM is proposed to investigate two primary concerns in slope stability analyses, i.e., critical slip surface (CSS) determination and safety factor (Fs) calculation. In our proposed numerical model, the optimization algorithm of MAX-MIN ant colony (MMACOA), which is considered to be an algorithm with the best performance for such optimization problems, will be used to determine CSS. In the process of determining the CSS, the trial safety factor for a trial slip surface is calculated with the Vector Sum method (VSM) according to the stress field produced by an NMM analysis. Accuracy of the numerical model is validated with three typical examples. The numerical model has great potential in the evaluation of stability of real slopes.
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stability analysis of slopes using the Vector Sum numerical manifold method
Bulletin of Engineering Geology and the Environment, 2021Co-Authors: Yongtao Yang, Hong ZhengAbstract:The NMM (numerical manifold method) has shown its ability to solve continuum and discontinuum engineering problems in the same framework. In the present paper, the Vector Sum NMM (VSNMM) is proposed to investigate the stability of slopes. With the (Vector Sum numerical manifold method) VSNMM, the FOSs (factors of safety) of slopes are obtained using the real stress fields of the slopes. Compared with the limit equilibrium methods, the deformation and stress field of a slope can be obtained using the VSNMM. Besides, the computational cost of the VSNMM is much less than that of the strength reduction numerical manifold method (SRNMM), since only one elasto-plastic analysis is needed in the VSNMM, while a series of elasto-plastic analyses is needed in the SRNMM. Based on the VSNMM, the stability analyses of two slopes including a homogeneous slope and an inhomogeneous slope with three different materials are conducted. The numerical results based on the two slopes show that the VSNMM can accurately calculate the FOSs of the slopes.
Carlos E Saavedra - One of the best experts on this subject based on the ideXlab platform.
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variable 360 Vector Sum phase shifter with coarse and fine Vector scaling
IEEE Transactions on Microwave Theory and Techniques, 2016Co-Authors: Mohammadmahdi Mohsenpour, Carlos E SaavedraAbstract:A CMOS Vector-Sum phase shifter covering the full 360° range is presented in this paper. Broadband operational transconductance amplifiers with variable transconductance provide coarse scaling of the quadrature Vector amplitudes. Fine scaling of the amplitudes is accomplished using a passive resistive network. Expressions are derived to predict the maximum bit resolution of the phase shifter from the scaling factor of the coarse and fine Vector-scaling stages. The phase shifter was designed and fabricated using the standard 130-nm CMOS process and was tested on-wafer over the frequency range of 4.9–5.9 GHz. The phase shifter delivers root mean square (rms) phase and amplitude errors of 1.25° and 0.7 dB, respectively, at the midband frequency of 5.4 GHz. The input and output return losses are both below 17 dB over the band, and the insertion loss is better than 4 dB over the band. The circuit uses an area of 0.303 mm2 excluding bonding pads and draws 28 mW from a 1.2 V supply.
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full 360 circ Vector Sum phase shifter for microwave system applications
IEEE Transactions on Circuits and Systems I-regular Papers, 2010Co-Authors: You Zheng, Carlos E SaavedraAbstract:An innovative Vector-Sum phase shifter with a full 360° variable phase-shift range is proposed and experimentally demonstrated in this paper. It employs an active balun and a very high-speed CMOS operational transconductance amplifier (OTA) integrator to generate the four quadrature basis Vector signals. The fabricated chip operates in the 2-3 GHz, it exhibits an average insertion gain of 1.5 dB at midband, and has an RMS phase error below 5° over the measured frequency span. The chip conSumes 24 mW of DC power and is highly compact, measuring only 0.38 mm2 including bonding pads.
Huei Wang - One of the best experts on this subject based on the ideXlab platform.
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a 57 66 ghz Vector Sum phase shifter with low phase amplitude error using a wilkinson power divider with lhtl rhtl elements
Compound Semiconductor Integrated Circuit Symposium, 2011Co-Authors: Penjui Peng, Juichih Kao, Huei WangAbstract:Abstract-A Vector Sum phase shifter (VSPS) using 90 nm CMOS process is presented. The VSPS can synthesize any amplitude and phase at certain frequencies, so the phase and amplitude error can be minimized. The proposed VSPS using a wideband Wilkinson power divider with left-hand transmission line (LHTL)/right-hand transmission line (RHTL) elements to achieve low phase error over a wide bandwidth. The measured RMS phase and amplitude error are under 5.1° and 0.5 dB over 57 -66 GHz, respectively. The average amplitude is about -5 dB. The dc power conSumption is less than 15.6 mW (13 mA, 1.2 V). The chip area is 0.315 mm2 without pads. To the authors knowledge, this phase shifter demonstrates the lowest RMS phase and amplitude error over a wide bandwidth among the reported phase shifters around 60 GHz in CMOS processes.
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new miniature 15 20 ghz continuous phase amplitude control mmics using 0 18 spl mu m cmos technology
IEEE Transactions on Microwave Theory and Techniques, 2006Co-Authors: Hongyeh Chang, Tianwei Huang, Mingda Tsai, Huei WangAbstract:The design and performance of two new miniature 360/spl deg/ continuous-phase-control monolithic microwave integrated circuits (MMICs) using the Vector Sum method are presented. Both are implemented using commercial 0.18-/spl mu/m CMOS process. The first phase shifter demonstrates all continuous phase and an insertion loss of 8 dB with a 37-dB dynamic range from 15 to 20 GHz. The chip size is 0.95 mm /spl times/ 0.76 mm. The second phase shifter can achieve all continuous phase and an insertion loss of 16.2 dB with a 38.8-dB dynamic range at the same frequency range. The chip size is 0.71 mm /spl times/ 0.82 mm. To the best of the authors' knowledge, these circuits are the first demonstration of microwave CMOS phase shifters using the Vector Sum method with the smallest chip size for all MMIC phase shifters with 360/spl deg/ phase-control range above 5 GHz reported to date.
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k band hbt and hemt monolithic active phase shifters using Vector Sum method
IEEE Transactions on Microwave Theory and Techniques, 2004Co-Authors: Poyu Chen, Tianwei Huang, Huei Wang, Yuchi Wang, Chunghsu Chen, Panechane ChaoAbstract:Two monolithic 3-bit active phase shifters using the Vector Sum method to K-band frequencies are reported in this paper. They are separately implemented using commercial 6-in GaAs HBT and high electron-mobility transistor (HEMT) monolithic-microwave integrated-circuit (MMIC) foundry processes. The MMIC HBT active phase shifter demonstrates an average gain of 8.87 dB and a maximum phase error of 11/spl deg/ at 18 GHz, while the HEMT phase shifter has 3.85-dB average measured gain with 11/spl deg/ maximum phase error at 20 GHz. The 20-GHz operation frequency of this HEMT MMIC is the highest among all the reported active phase shifters. The analysis for gain deviation and phase error of the active phase shifter using the Vector Sum method due to the individual variable gain amplifiers is also presented. The theoretical analysis can predict the measured minimum root-mean-square phase error 4.7/spl deg/ within 1/spl deg/ accuracy.
