The Experts below are selected from a list of 360 Experts worldwide ranked by ideXlab platform
K C Saraswat - One of the best experts on this subject based on the ideXlab platform.
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Schottky Barrier Height reduction for holes by fermi level depinning using metal nickel oxide silicon contacts
Applied Physics Letters, 2014Co-Authors: Raisul Islam, Gautam Shine, K C SaraswatAbstract:We report the experimental demonstration of Fermi level depinning using nickel oxide (NiO) as the insulator material in metal-insulator-semiconductor (M-I-S) contacts. Using this contact, we show less than 0.1 eV Barrier Height for holes in platinum/NiO/silicon (Pt/NiO/p-Si) contact. Overall, the pinning factor was improved from 0.08 (metal/Si) to 0.26 (metal/NiO/Si). The experimental results show good agreement with that obtained from theoretical calculation. NiO offers high conduction band offset and low valence band offset with Si. By reducing Schottky Barrier Height, this contact can be used as a carrier selective contact allowing hole transport but blocking electron transport, which is important for high efficiency in photonic applications such as photovoltaics and optical detectors.
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Schottky Barrier Height reduction for metal n gasb contact by inserting tio2 interfacial layer with low tunneling resistance
Applied Physics Letters, 2011Co-Authors: Ze Yuan, Aneesh Nainani, Yun Sun, J Jason Y Lin, P Pianetta, K C SaraswatAbstract:Fermi level pinning near GaSb valence band edge leads to high Schottky Barrier Height for metal/n-type GaSb contacts. However, this effect can be alleviated by depinning of the Fermi level with the introduction of thin interfacial dielectric. In this paper, the use of TiO2 allows depinning of the Fermi level without introducing excessive tunneling resistance due to the low conduction band offset, estimated by synchrotron radiation photoemission spectroscopy. It is shown the insertion of TiO2 results in reduction in Schottky Barrier Height and greater than four orders of magnitude increase in current density for metal contacts on n-type GaSb.
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the influence of fermi level pinning depinning on the Schottky Barrier Height and contact resistance in ge cofeb and ge mgo cofeb structures
Applied Physics Letters, 2010Co-Authors: Donkoun Lee, K C Saraswat, Shyam Sunder Raghunathan, Robert J Wilson, Dmitri E Nikonov, Shan X WangAbstract:We demonstrated that an ultrathin MgO layer between CoFeB and Ge modulated the Schottky Barrier Heights and contact resistances of spin diodes. We confirmed that, surprisingly, an insulating MgO layer significantly decreased the Schottky Barrier Heights and contact resistances of spin diodes on N+Ge, opposite to the increase observed for P+Ge. A 0.5 nm thick MgO layer on N+Ge decreases the Schottky Barrier Height from 0.47 to 0.05 eV and lowers the minimum contact resistance 100-fold to 1.5×10−6 Ω m2. These results open a pathway for high efficient spin injection from ferromagnetic materials and semiconductors.
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fermi level depinning in metal ge Schottky junction for metal source drain ge metal oxide semiconductor field effect transistor application
Journal of Applied Physics, 2009Co-Authors: Masaharu Kobayashi, Atsuhiro Kinoshita, K C Saraswat, H Philip S Wong, Yoshio NishiAbstract:Schottky Barrier Height modulation in metal/Ge Schottky junction was demonstrated by inserting an ultrathin interfacial silicon nitride layer. The SiN interfacial layer suppressed strong Fermi level pinning in metal/Ge Schottky junction, which resulted in effective control of Schottky Barrier Height. Metal/SiN/Ge Schottky diode was systematically investigated in terms of SiN thickness dependence and metal work function dependence. At an optimal SiN thickness, Ohmic contact between metal and Ge was obtained as a result of Fermi level depinning, and almost ideal Schottky Barrier Height determined by the work function difference between the metal and Ge was achieved. This technology was finally applied to metal source/drain Ge metal-oxide-semiconductor field-effect-transistors with low source/drain resistance.
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fermi level depinning in metal ge Schottky junction and its application to metal source drain ge nmosfet
Symposium on VLSI Technology, 2008Co-Authors: Masaharu Kobayashi, K C Saraswat, A Kinoshita, H S P Wong, Yoshio NishiAbstract:We successfully demonstrated Schottky Barrier Height modulation in metal/Ge Schottky junction by inserting an ultrathin interfacial SiN layer. The SiN layer suppressed strong Fermi level pinning in metal/Ge junction, which resulted in effective control of the Schottky Barrier Height. We systematically investigated its physics, for the first time, and almost zero Schottky Barrier Height was successfully obtained for electrons. We applied this technology to metal source/drain Ge NMOSFET and achieved low source/drain resistance.
Yeechia Yeo - One of the best experts on this subject based on the ideXlab platform.
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selenium segregation for effective Schottky Barrier Height reduction in nige n ge contacts
IEEE Electron Device Letters, 2012Co-Authors: Yi Tong, Bin Liu, Phyllis Shi Ya Lim, Yeechia YeoAbstract:In this letter, we report the demonstration of an effective electron Schottky Barrier Height (ΦBn) reduction technology for NiGe/n-type Germanium (n-Ge) contacts using ion implantation of selenium (Se) followed by its segregation at NiGe/n-Ge interface. Se was found to segregate at NiGe/n-Ge interface after germanide formation. Nickel monogermanide was formed using a 350°C 30-s anneal. Se segregation gives ΦBn as low as ~0.13 eV.
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effect of substitutional carbon concentration on Schottky Barrier Height of nickel silicide formed on epitaxial silicon carbon films
Journal of Applied Physics, 2009Co-Authors: Phyllis Shi Ya Lim, Mantavya Sinha, R T P Lee, Dongzhi Chi, Yeechia YeoAbstract:The effective electron Schottky Barrier Height (ΦBN) of nickel silicide (NiSi:C) formed on silicon-carbon (Si1−yCy or Si:C) films with different substitutional carbon concentrations Csub was investigated. ΦBN was observed to decrease substantially with an increase in Csub. When Csub is increased from 0% to 1.5%, ΦBN is reduced by 200 meV. The results of this work could be useful for the reduction in contact resistance between nickel silicide and silicon-carbon source and drain in strained n-channel metal-oxide-semiconductor field-effect transistors.
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low Schottky Barrier Height for silicides on n type si 100 by interfacial selenium segregation during silicidation
Applied Physics Letters, 2008Co-Authors: Hoongshing Wong, Lap Chan, G S Samudra, Yeechia YeoAbstract:The electron Schottky Barrier Height ΦBn modulation for NiSi and PtSi formed on selenium-implanted n-type Si (100) has been experimentally investigated. Selenium (Se) segregation is observed at the silicide/n-Si(100) interface during silicidation process. ΦBn of 83 and 120 meV were achieved for Se segregated NiSi and PtSi on n-Si (100) interfaces, respectively. Contrary to previously reported Fermi level depinning effect in monolayer Se-passivated n-Si (100), the low ΦBn achieved in this work points to metal silicide Fermi level pinning near to conduction band EC of n-Si (100).
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tuning the Schottky Barrier Height of nickel silicide on p silicon by aluminum segregation
Applied Physics Letters, 2008Co-Authors: Mantavya Sinha, Eng Fong Chor, Yeechia YeoAbstract:We report the Schottky Barrier Height (SBH) tuning at the nickel silicide (NiSi)∕p-Si junction by the introduction of aluminum (Al) using ion implantation and its segregation after silicidation. The SBH for holes has been found to decrease with increasing concentration of Al at the NiSi∕p-Si interface. We demonstrate the achievement of one of the lowest reported SBH for holes of 0.12eV, with less than 0.1at.% Al in NiSi, which is promising for application in p-channel Schottky source/drain transistors.
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sub 0 1 ev effective Schottky Barrier Height for nisi on n type si 100 using antimony segregation
IEEE Electron Device Letters, 2007Co-Authors: Hoongshing Wong, Lap Chan, G S Samudra, Yeechia YeoAbstract:We report a new method of forming nickel silicide (NiSi) on n-Si with low contact resistance, which achieves a Schottky Barrier Height of as low as 0.074 eV. Antimony (Sb) and nickel were introduced simultaneously and annealed to form NiSi on n-Si (100). Sb dopant atoms were found to segregate at the NiSi/Si interface. The devices with Sb segregation show complete nickel monosilicide formation on n-Si (100) and a close-to-unity rectification ratio. The rectification ratio Rc is defined to be the ratio of the forward current to the reverse current, where the forward and reverse currents are measured using forward and reverse bias voltages, respectively, having the same magnitude of 0.5 V. This process is also compatible and easily integrated in a CMOS fabrication process flow.
Yoshio Nishi - One of the best experts on this subject based on the ideXlab platform.
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formation of epitaxial hf germanide ge contacts for Schottky Barrier Height engineering
International Workshop on Junction Technology, 2017Co-Authors: Osamu Nakatsuka, Yoshio Nishi, Akihiro Suzuki, James P Mcvittie, Shigeaki ZaimaAbstract:Germanium (Ge) is a promising candidate semiconductor for channel material of low power consumption and high performance field-effect transistors (FETs) alternative to silicon because of high hole and electron mobilities and good process affinity of Ge for the integration on Si nanoelectronics. One of serious issues of Ge for the practical FET application is a high parasitic resistance at metal/n-type Ge (n-Ge) contact since its high contact resistivity owing to a high Schottky Barrier Height (SBH) of metal/n-Ge interface around 0.5–0.6 eV [1,2].
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fermi level depinning in metal ge Schottky junction for metal source drain ge metal oxide semiconductor field effect transistor application
Journal of Applied Physics, 2009Co-Authors: Masaharu Kobayashi, Atsuhiro Kinoshita, K C Saraswat, H Philip S Wong, Yoshio NishiAbstract:Schottky Barrier Height modulation in metal/Ge Schottky junction was demonstrated by inserting an ultrathin interfacial silicon nitride layer. The SiN interfacial layer suppressed strong Fermi level pinning in metal/Ge Schottky junction, which resulted in effective control of Schottky Barrier Height. Metal/SiN/Ge Schottky diode was systematically investigated in terms of SiN thickness dependence and metal work function dependence. At an optimal SiN thickness, Ohmic contact between metal and Ge was obtained as a result of Fermi level depinning, and almost ideal Schottky Barrier Height determined by the work function difference between the metal and Ge was achieved. This technology was finally applied to metal source/drain Ge metal-oxide-semiconductor field-effect-transistors with low source/drain resistance.
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fermi level depinning in metal ge Schottky junction and its application to metal source drain ge nmosfet
Symposium on VLSI Technology, 2008Co-Authors: Masaharu Kobayashi, K C Saraswat, A Kinoshita, H S P Wong, Yoshio NishiAbstract:We successfully demonstrated Schottky Barrier Height modulation in metal/Ge Schottky junction by inserting an ultrathin interfacial SiN layer. The SiN layer suppressed strong Fermi level pinning in metal/Ge junction, which resulted in effective control of the Schottky Barrier Height. We systematically investigated its physics, for the first time, and almost zero Schottky Barrier Height was successfully obtained for electrons. We applied this technology to metal source/drain Ge NMOSFET and achieved low source/drain resistance.
R T Tung - One of the best experts on this subject based on the ideXlab platform.
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the physics and chemistry of the Schottky Barrier Height
Applied physics reviews, 2014Co-Authors: R T TungAbstract:The formation of the Schottky Barrier Height (SBH) is a complex problem because of the dependence of the SBH on the atomic structure of the metal-semiconductor (MS) interface. Existing models of the SBH are too simple to realistically treat the chemistry exhibited at MS interfaces. This article points out, through examination of available experimental and theoretical results, that a comprehensive, quantum-mechanics-based picture of SBH formation can already be constructed, although no simple equations can emerge, which are applicable for all MS interfaces. Important concepts and principles in physics and chemistry that govern the formation of the SBH are described in detail, from which the experimental and theoretical results for individual MS interfaces can be understood. Strategies used and results obtained from recent investigations to systematically modify the SBH are also examined from the perspective of the physical and chemical principles of the MS interface.
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chemical bonding and fermi level pinning at metal semiconductor interfaces
Physical Review Letters, 2000Co-Authors: R T TungAbstract:Since the time of Bardeen, Fermi level pinning at metal-semiconductor interfaces has traditionally been attributed to interface gap states. The present work shows that polarized chemical bonds at metal-semiconductor interfaces can lead to the apparent Fermi level pinning effect. Good agreement with various systematics of polycrystalline Schottky Barrier Height experiments has been found. These findings suggest that chemical bonding is a primary mechanism of the Schottky Barrier Height.
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electron transport at metal semiconductor interfaces general theory
Physical Review B, 1992Co-Authors: R T TungAbstract:A dipole-layer approach is presented, which leads to analytic solutions to the potential and the electronic transport at metal-semicondutor interfaces with arbitrary Schottky-Barrier-Height profiles. The presence of inhomogeneities in the Schottky-Barrier Height is shown to lead to a coherent explanation of many anomalies in the experimental results. These results suggest that the formation mechanism of the Schottky Barrier is locally nonuniform at common, polycrystalline, metal-semiconductor interfaces
H Philip S Wong - One of the best experts on this subject based on the ideXlab platform.
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metal iii v Schottky Barrier Height tuning for the design of nonalloyed iii v field effect transistor source drain contacts
Journal of Applied Physics, 2010Co-Authors: Krishna C Saraswat, H Philip S WongAbstract:In this work, we introduce a novel nonalloyed contact structure for n-GaAs and n-In0.53Ga0.47As by using single metals in combination with a thin dielectric to tune the effective metal/III-V work function toward the conduction band edge. We reduced the effective Schottky Barrier Height (ΦB,eff) of Al/GaAs from 0.75 to 0.17 eV through the use of a thin atomic layer deposition Al2O3. Barrier Height reduction was verified for a variety of metals (Y, Er, Al, Ti, and W) through direct measurements and deduced from increased diode current and reduced contact resistance. Similar results were observed on n-In0.53Ga0.47As. Two possible underlying mechanisms are discussed: one based on the formation of a dielectric dipole and the other based on the blocking of metal induced gap states. This structure has applications as a nonalloyed low resistance ohmic contact for III-V metal-oxide-semiconductor field-effect transistors (MOSFETs) or high electron mobility transistors (HEMTs), and as a near zero Barrier Height cont...
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fermi level depinning in metal ge Schottky junction for metal source drain ge metal oxide semiconductor field effect transistor application
Journal of Applied Physics, 2009Co-Authors: Masaharu Kobayashi, Atsuhiro Kinoshita, K C Saraswat, H Philip S Wong, Yoshio NishiAbstract:Schottky Barrier Height modulation in metal/Ge Schottky junction was demonstrated by inserting an ultrathin interfacial silicon nitride layer. The SiN interfacial layer suppressed strong Fermi level pinning in metal/Ge Schottky junction, which resulted in effective control of Schottky Barrier Height. Metal/SiN/Ge Schottky diode was systematically investigated in terms of SiN thickness dependence and metal work function dependence. At an optimal SiN thickness, Ohmic contact between metal and Ge was obtained as a result of Fermi level depinning, and almost ideal Schottky Barrier Height determined by the work function difference between the metal and Ge was achieved. This technology was finally applied to metal source/drain Ge metal-oxide-semiconductor field-effect-transistors with low source/drain resistance.